User contributions
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- 08:57, 17 October 2019 (diff | hist) . . (+34) . . Power (Bora/BoraLite)
- 08:57, 17 October 2019 (diff | hist) . . (+125) . . Power (Bora/BoraLite) (→Power Supply Unit (PSU) and recommended power-up sequence)
- 08:56, 17 October 2019 (diff | hist) . . (0) . . N File:BoraLite-power-sequence1.jpg (current)
- 08:55, 17 October 2019 (diff | hist) . . (0) . . N File:BoraLite-power-sequence.jpg (current)
- 07:58, 17 October 2019 (diff | hist) . . (+186) . . Physical devices mapping (BELK/BXELK)
- 07:40, 17 October 2019 (diff | hist) . . (+3) . . Processor and memory subsystem (BoraLite) (→Processor Info)
- 07:33, 17 October 2019 (diff | hist) . . (+10) . . BELK/BXELK Quick Start Guide (→Target setup and first boot)
- 07:32, 17 October 2019 (diff | hist) . . (+24) . . BELK/BXELK Quick Start Guide
- 07:32, 17 October 2019 (diff | hist) . . (+105) . . BELK/BXELK Quick Start Guide (→Target setup and first boot)
- 07:31, 17 October 2019 (diff | hist) . . (0) . . N File:BoraX-BoraXEVB-Lite-1st-boot.jpg (current)
- 07:30, 17 October 2019 (diff | hist) . . (+1) . . On board JTAG connector (BoraLite)
- 07:30, 17 October 2019 (diff | hist) . . (0) . . N File:BORAlite-jtag-conn1.png (current)
- 07:28, 17 October 2019 (diff | hist) . . (0) . . File:BORAlite-jtag-conn.png (U0007 uploaded a new version of File:BORAlite-jtag-conn.png) (current)
- 07:26, 17 October 2019 (diff | hist) . . (0) . . N File:BORAlite-jtag-conn.png
- 07:00, 17 October 2019 (diff | hist) . . (+5,277) . . N Processor and memory subsystem (BoraLite) (Created page with "{{InfoBoxTop}} {{Applies To BoraLite}} {{InfoBoxBottom}} = Design Overview = The heart of BORA Lite module is composed of the following components: * Xilinx Zynq XC7Z007S/01...")
- 06:02, 17 October 2019 (diff | hist) . . (0) . . m Reset scheme (Bora/BoraLite) (U0007 moved page Reset scheme (Bora) to Reset scheme (Bora/BoraLite))
- 06:02, 17 October 2019 (diff | hist) . . (+42) . . N Reset scheme (Bora) (U0007 moved page Reset scheme (Bora) to Reset scheme (Bora/BoraLite)) (current) (Tag: New redirect)
- 06:02, 17 October 2019 (diff | hist) . . (+414) . . Reset scheme (Bora/BoraLite)
- 14:32, 16 October 2019 (diff | hist) . . (+24) . . BELK/BXELK software components
- 14:01, 16 October 2019 (diff | hist) . . (0) . . m RTC (Bora/BoraLite) (U0007 moved page RTC (Bora) to RTC (Bora/BoraLite))
- 14:01, 16 October 2019 (diff | hist) . . (+33) . . N RTC (Bora) (U0007 moved page RTC (Bora) to RTC (Bora/BoraLite)) (current) (Tag: New redirect)
- 14:01, 16 October 2019 (diff | hist) . . (+93) . . RTC (Bora/BoraLite)
- 13:59, 16 October 2019 (diff | hist) . . (+2,999) . . N Watchdog (BoraLite) (Created page with "{{InfoBoxTop}} {{Applies To BoraLite}} {{InfoBoxBottom}} ==Description and default configuration== An external watchdog timer (WDT), Maxim MAX6373<ref name="MAX6373">https://...")
- 13:48, 16 October 2019 (diff | hist) . . (+24) . . System boot and recovery via microSD card (BELK/BXELK)
- 13:47, 16 October 2019 (diff | hist) . . (+24) . . Standalone boot (BELK/BXELK)
- 13:46, 16 October 2019 (diff | hist) . . (+24) . . Restoring U-Boot on SPI NOR flash (BELK/BXELK)
- 13:14, 16 October 2019 (diff | hist) . . (+2) . . Category:BoraLite (→Hardware Documentation)
- 12:55, 16 October 2019 (diff | hist) . . (+7,164) . . N Processing system peripherals (BoraLite) (Created page with "{{InfoBoxTop}} {{Applies To BoraLite}} {{InfoBoxBottom}} == Introduction == Bora modules implement a number of peripheral interfaces through the J1 connector. The following...")
- 12:25, 16 October 2019 (diff | hist) . . (+24) . . Product serial number (current)
- 11:27, 16 October 2019 (diff | hist) . . (+817) . . N Mechanicals (BoraLite) (Created page with "{{InfoBoxTop}} {{Applies To BoraLite}} {{InfoBoxBottom}} = Mechanical specifications = This chapter describes the mechanical characteristics of the BORA Lite module. == Boa...")
- 11:17, 16 October 2019 (diff | hist) . . (+24) . . Logical structure of Bora and BoraX Embedded Linux Kits (BELK/BXELK)
- 11:16, 16 October 2019 (diff | hist) . . (+24) . . Introduction to development environment (BELK/BXELK)
- 11:15, 16 October 2019 (diff | hist) . . (+24) . . Host setup and development flow (BELK/BXELK)
- 11:14, 16 October 2019 (diff | hist) . . (+575) . . ConfigID management (BELK/BXELK)
- 10:35, 16 October 2019 (diff | hist) . . (0) . . Programmable logic (BORAXpress) (→Introduction)
- 10:33, 16 October 2019 (diff | hist) . . (+20,244) . . Programmable logic (BoraLite)
- 08:49, 16 October 2019 (diff | hist) . . (0) . . Programmable logic (Bora) (→FPGA Bank 34)
- 07:58, 16 October 2019 (diff | hist) . . (+6) . . Category:Bora (→Hardware Documentation)
- 07:28, 16 October 2019 (diff | hist) . . (+4) . . Pinout (BoraLite) (→J1 odd pins (1 to 203))
- 07:25, 16 October 2019 (diff | hist) . . (+4,254) . . N Programmable logic (BoraLite) (Created page with "{{InfoBoxTop}} {{Applies To BoraLite}} {{InfoBoxBottom}} == Introduction == The following paragraphs describe in detail the available PL I/O pins and how they are routed to...")
- 14:59, 15 October 2019 (diff | hist) . . (+24) . . Build system (BELK/BXELK)
- 14:57, 15 October 2019 (diff | hist) . . (+142) . . ConfigID and UniqueID (→DAVE Embedded Systems' hardware implementation)
- 14:51, 15 October 2019 (diff | hist) . . (+2) . . Category:BoraLite (→Software Documentation)
- 14:50, 15 October 2019 (diff | hist) . . (+2) . . Category:BoraX (→Software Documentation)
- 14:28, 15 October 2019 (diff | hist) . . (-754) . . On board JTAG connector (AxelLite) (Undo revision 9016 by U0007 (talk)) (Tag: Undo)
- 14:28, 15 October 2019 (diff | hist) . . (+754) . . On board JTAG connector (AxelLite) (Undo revision 9018 by U0007 (talk)) (Tag: Undo)
- 14:27, 15 October 2019 (diff | hist) . . (-754) . . m On board JTAG connector (AxelLite) (Reverted edits by U0007 (talk) to last revision by DevWikiAdmin) (Tag: Rollback)
- 14:27, 15 October 2019 (diff | hist) . . (+1,553) . . N On board JTAG connector (BoraLite) (Created page with "{{InfoBoxTop}} {{Applies To BoraLite}} {{InfoBoxBottom}} == Introduction == JTAG signals are routed to a dedicated connector (J2) on the BORA Lite PCB. The connector is plac...")
- 14:26, 15 October 2019 (diff | hist) . . (+754) . . On board JTAG connector (AxelLite)
- 14:19, 15 October 2019 (diff | hist) . . (+40) . . N FAQs (Bora/BoraX) (U0007 moved page FAQs (Bora/BoraX) to FAQs (Bora/BoraX/BoraLite)) (current) (Tag: New redirect)
- 14:18, 15 October 2019 (diff | hist) . . (0) . . m FAQs (Bora/BoraX/BoraLite) (U0007 moved page FAQs (Bora/BoraX) to FAQs (Bora/BoraX/BoraLite)) (current)
- 14:18, 15 October 2019 (diff | hist) . . (+24) . . BoraXEVB
- 14:17, 15 October 2019 (diff | hist) . . (+45) . . Booting the system via NFS (BELK/BXELK)
- 14:16, 15 October 2019 (diff | hist) . . (+45) . . Booting Linux Kernel
- 14:15, 15 October 2019 (diff | hist) . . (+24) . . FAQs (Bora/BoraX/BoraLite)
- 14:14, 15 October 2019 (diff | hist) . . (+24) . . Development Kits Identification Codes
- 14:14, 15 October 2019 (diff | hist) . . (+2) . . Creating and building example Vivado project (BELK/BXELK)
- 14:14, 15 October 2019 (diff | hist) . . (+22) . . Creating and building example Vivado project (BELK/BXELK)
- 14:07, 15 October 2019 (diff | hist) . . (+24) . . ConfigID and UniqueID
- 14:07, 15 October 2019 (diff | hist) . . (+24) . . Carrier board design guidelines (SOM)
- 14:07, 15 October 2019 (diff | hist) . . (+24) . . Building Linux kernel (BELK/BXELK)
- 14:06, 15 October 2019 (diff | hist) . . (+24) . . Building the Yocto BSP (BELK/BXELK)
- 14:06, 15 October 2019 (diff | hist) . . (+24) . . Building U-Boot (BELK/BXELK)
- 14:00, 15 October 2019 (diff | hist) . . (+401) . . N Template:Applies To BoraLite (Created page with "<div style="float:left;border:solid #00ffcc 1px;margin:1px"> {| cellspacing="0" style="width:238px;background:#c5fcdc" | style="width:45px;height:45px;background:#6ef7a7;text-...") (current)
- 13:56, 15 October 2019 (diff | hist) . . (+9) . . Pinout (BoraLite) (→Introduction)
- 13:54, 15 October 2019 (diff | hist) . . (0) . . Pinout (BoraLite)
- 13:53, 15 October 2019 (diff | hist) . . (0) . . Pinout (BoraLite) (→J1 even pins (2 to 204))
- 13:52, 15 October 2019 (diff | hist) . . (+6) . . Pinout (BoraLite) (→J1 odd pins (1 to 203))
- 13:50, 15 October 2019 (diff | hist) . . (+83) . . Pinout (BoraLite) (→J1 odd pins (1 to 203))
- 13:49, 15 October 2019 (diff | hist) . . (0) . . Pinout (BoraLite) (→J1 odd pins (1 to 203))
- 13:48, 15 October 2019 (diff | hist) . . (-2) . . Pinout (BoraLite) (→J1 even pins (2 to 204))
- 13:47, 15 October 2019 (diff | hist) . . (+7,620) . . Pinout (BoraLite)
- 09:13, 15 October 2019 (diff | hist) . . (+9,247) . . N Pinout (BoraLite) (Created page with "{{InfoBoxTop}} {{Applies To BoraLite}} {{InfoBoxBottom}} ==Introduction== This chapter contains the pinout description of the BORA Lite SOM, grouped in two tables (odd and ev...")
- 10:35, 14 October 2019 (diff | hist) . . (-1) . . Category:BoraX
- 10:23, 14 October 2019 (diff | hist) . . (0) . . Category:BoraLite (→BORA Lite Xilinx ZYNQ XC7007S/12S/14S / XC7Z010 / XC7Z020 SOM module)
- 10:20, 14 October 2019 (diff | hist) . . (+5) . . Category:BoraLite (→Stay tuned with updates: BORA RSS Feed)
- 10:20, 14 October 2019 (diff | hist) . . (+1) . . Category:BoraLite (→BORA Lite Evaluation Kit)
- 10:19, 14 October 2019 (diff | hist) . . (+9,190) . . N Category:BoraLite (Created page with "<div style="clear:right; margin-bottom: .5em; float: right; padding: .5em 0 .8em 1.4em; background: none;"> __TOC__ </div> = BORA Lite Xilinx ZYNQ XC7007S/12S/14S / XC7Z010 /...")
- 10:18, 14 October 2019 (diff | hist) . . (+42) . . Main Page
- 09:59, 14 October 2019 (diff | hist) . . (0) . . N File:Boralite-bd.png (current)
- 09:37, 14 October 2019 (diff | hist) . . (+352) . . Main Page
- 09:34, 14 October 2019 (diff | hist) . . (0) . . N File:BORALite-TOP.png (current)
- 06:46, 14 October 2019 (diff | hist) . . (-914) . . Axel Embedded Linux Kit (XELK) (→Updating git repositories)
- 06:41, 14 October 2019 (diff | hist) . . (-37) . . Axel Embedded Linux Kit (XELK) (→XELK Updates)
- 06:39, 14 October 2019 (diff | hist) . . (-10) . . Axel Embedded Linux Kit (XELK) (→Updating git repositories)
- 06:35, 14 October 2019 (diff | hist) . . (+4) . . Axel Embedded Linux Kit (XELK) (→XELK software components)
- 06:34, 14 October 2019 (diff | hist) . . (-715) . . Axel Embedded Linux Kit (XELK) (→Release notes)
- 13:05, 11 October 2019 (diff | hist) . . (+230) . . BELK/BXELK software components (→Release notes)
- 10:14, 11 October 2019 (diff | hist) . . (+20) . . BELK/BXELK software components (→Kits' composition)
- 06:38, 11 October 2019 (diff | hist) . . (+125) . . XELK-TN-001: Using Chromium browser as an Embedded GUI
- 06:29, 11 October 2019 (diff | hist) . . (-239) . . XELK-TN-001: Using Chromium browser as an Embedded GUI
- 06:26, 11 October 2019 (diff | hist) . . (+276) . . Axel Embedded Linux Kit (XELK) (→XELK 4.0.0)
- 06:24, 11 October 2019 (diff | hist) . . (0) . . Axel Embedded Linux Kit (XELK) (→XELK software components)
- 06:24, 11 October 2019 (diff | hist) . . (+644) . . Axel Embedded Linux Kit (XELK) (→XELK software components)
- 08:02, 9 October 2019 (diff | hist) . . (+723) . . XELK-TN-001: Using Chromium browser as an Embedded GUI (→Results)
- 08:00, 9 October 2019 (diff | hist) . . (0) . . N File:Chrome.png (current)
- 07:40, 9 October 2019 (diff | hist) . . (0) . . N File:Phpinfo.png (current)
- 07:36, 9 October 2019 (diff | hist) . . (0) . . N File:EZServer.png (current)
- 07:35, 9 October 2019 (diff | hist) . . (0) . . N File:EZServer-top.png (current)
- 07:13, 9 October 2019 (diff | hist) . . (+6) . . XELK-TN-001: Using Chromium browser as an Embedded GUI (→Introduction)
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