On board JTAG connector (AxelLite)
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THIS PAGE IS OBSOLETE, DON'T USE IT AS REFERENCE |
| The new documentation is available here: AXEL_Lite_SOM/AXEL_Lite_Hardware/Power_and_Reset/JTAG | |
Introduction[edit | edit source]
JTAG signals are routed to a dedicated connector (J7) on the Axel Lite PCB. The connector is placed on the top side of the PCB, at the upper-right corner (please see the picture below).
J7 - Connector's pinout[edit | edit source]
J7 footprint mates with Samtec FSI-110-03-G-S connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | DGND | - | - |
| 2 | JTAG_TCK | - | - |
| 3 | JTAG_TMS | - | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
| 4 | JTAG_TDO | - | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
| 5 | JTAG_TDI | - | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
| 6 | JTAG_nTRST | - | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
| 7 | CPU_PORn | - | - |
| 8 | N.C. | - | - |
| 9 | N.C. | - | - |
| 10 | JTAG_VREF | - | 3V3 (BOARD_PGOOD driven signal) |
