DESK-XZ7-L-AN-0001: Using a VirtualBox Ubuntu 20.04 Virtual Machine
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| Issue Date | Notes | ||
| 2024/01/30 | DESK-XZ7-L-1.0.1 release | ||
Contents
Virtual Machine[edit | edit source]
DESK-XZ7-L contains all the required software and documentation to start developing with Vivado, Vitis and Petalinux application on the BORA BORA Xpress BORA Lite platforms. DESK-XZ7-L provides also a virtual machine - a.k.a. DVDK - with the following features:
- VirtualBox virtual machine (.OVA archive)
- based on Lubuntu 20.04 LTS (64-bit version)
- pre-installed VirtualBox Guest Additions
- LXDE desktop environment
- boot disk with the distro and pre-configured basic Linux services:
- TFTP: with base directory
/tftpboot/ - NFS: configured through the
/etc/exportsfile
- TFTP: with base directory
- pre-installed Vivado, Vitis and Petalinux requirements, as described here
- MVM has: 2 CPUs, 8192MB of RAM and 300 GB of HDD
- administrator account (dvdk) with autologin. Please note that the user account credentials are provided with the development kit (you can find them in the README file contained in the sw/dvdk folder of the kit distribution)
- user: dvdk
- password: dvdk
Host setup[edit | edit source]
As previously stated, host tools are based on a Managed Virtual Machine. MVM OVA files can be downloaded here. For accessing the DESK Reserved area please contact our helpdesk support channel
To install the Virtual Machine OVA file, please refer to this page.
It is worth remembering that accessing the git repositories is required to download target source code. For getting access, please refer to this page.
Virtual Machine updates[edit | edit source]
The Ubuntu distribution may ask for an update, if available, due to the Update Notifier.
The updates are not required for DESK Virtual Machine functionality.
 It is suggested to not install the updates. They may change or corrupt what tested and documented in our wiki pages |
If this is annoying for you, it is possible to disable it.
Installing Vivado and Vitis[edit | edit source]
|
Vivado and Vitis require large amount of resources: we suggest to use a build server instead of a Virtual Machine |
For installing Vivado and Vitis, please follow the steps here below
- download
Xilinx_Unified_2021.2_1021_0703_Lin64.binfrom official Xilinx download page and copy the file in the MVM. TheXilinx-2021.2directory has been created and the installation file has been copied. The version used inDESK-XZ7-L-1.0.1isVivado ML 2021.2 - change file permission as executable
dvdk@vagrant:~$ cd Xilinx-2021.2 dvdk@vagrant:~/Xilinx-2021.2$ chmod u+x Xilinx_Unified_2021.2_1021_0703_Lin64.bin
- run
Xilinx_Unified_2021.2_1021_0703_Lin64.binfile
dvdk@vagrant:~/Xilinx-2021.2$ ./Xilinx_Unified_2021.2_1021_0703_Lin64.bin Verifying archive integrity... All good. Uncompressing Xilinx Installer..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
- Step for install Vivado and Vitis
- open Vivado from a terminal
dvdk@vagrant:~$ source Vivado/2021.2/settings64.sh
dvdk@vagrant:~$ vivado
****** Vivado v2021.2 (64-bit)
**** SW Build 3367213 on Tue Oct 19 02:47:39 MDT 2021
**** IP Build 3369179 on Thu Oct 21 08:25:16 MDT 2021
** Copyright 1986-2021 Xilinx, Inc. All Rights Reserved.
start_gui
- open Vitis from a terminal
dvdk@vagrant:~$ source Vitis/2021.2/settings64.sh
dvdk@vagrant:~$ vitis
****** Xilinx Vitis Development Environment
****** Vitis v2021.2 (64-bit)
**** SW Build 3363750 on 2021-10-16-13:10:08
** Copyright 1986-2021 Xilinx, Inc. All Rights Reserved.
Launching Vitis with command /home/dvdk/vitis/Vitis/2021.2/eclipse/lnx64.o/eclipse -vmargs -Xms64m -Xmx1024m -Dorg.eclipse.swt.internal.gtk.cairoGraphics=false -Dosgi.configuration.area=@user.home/.Xilinx/Vitis/2021.2 --add-modules=ALL-SYSTEM --add-opens=java.base/java.nio=ALL-UNNAMED --add-opens=java.desktop/sun.swing=ALL-UNNAMED --add-opens=java.desktop/javax.swing=ALL-UNNAMED --add-opens=java.desktop/javax.swing.tree=ALL-UNNAMED --add-opens=java.desktop/javax.swing.plaf.basic=ALL-UNNAMED --add-opens=java.desktop/javax.swing.plaf.synth=ALL-UNNAMED --add-opens=java.desktop/com.sun.awt=ALL-UNNAMED --add-opens=java.desktop/sun.awt.X11=ALL-UNNAMED &
dvdk@vagrant:~$
Example of building bora.xsa with Vivado[edit | edit source]
Here below there is an example of building bora.xsa using Vivado
dvdk@vagrant:~$ git clone --recursive git@gitlab.com:DAVEEmbeddedSystems/desk/desk-xz7-l/petalinux.git -b desk-xz7-l-1.0.1
Cloning into 'petalinux'...
remote: Enumerating objects: 992, done.
remote: Counting objects: 100% (992/992), done.
remote: Compressing objects: 100% (550/550), done.
remote: Total 992 (delta 546), reused 697 (delta 378), pack-reused 0
Receiving objects: 100% (992/992), 2.71 MiB | 4.76 MiB/s, done.
Resolving deltas: 100% (546/546), done.
Note: switching to '829c44d28c8c46b51744c14a92107ec3c5790934'.
You are in 'detached HEAD' state. You can look around, make experimental
changes and commit them, and you can discard any commits you make in this
state without impacting any branches by switching back to a branch.
If you want to create a new branch to retain commits you create, you may
do so (now or later) by using -c with the switch command. Example:
git switch -c <new-branch-name>
Or undo this operation with:
git switch -
Turn off this advice by setting config variable <code>advice.detachedHead</code> to false
Submodule 'project-spec/meta-dave' (git@gitlab.com:DAVEEmbeddedSystems/desk/desk-xz7-l/meta-dave.git) registered for path 'project-spec/meta-dave'
Submodule 'vivado' (git@gitlab.com:DAVEEmbeddedSystems/desk/desk-xz7-l/vivado.git) registered for path 'vivado'
Cloning into '/home/dvdk/petalinux/project-spec/meta-dave'...
remote: Enumerating objects: 569, done.
remote: Counting objects: 100% (569/569), done.
remote: Compressing objects: 100% (240/240), done.
remote: Total 569 (delta 252), reused 528 (delta 233), pack-reused 0
Receiving objects: 100% (569/569), 28.83 MiB | 10.49 MiB/s, done.
Resolving deltas: 100% (252/252), done.
Cloning into '/home/dvdk/petalinux/vivado'...
remote: Enumerating objects: 733, done.
remote: Counting objects: 100% (39/39), done.
remote: Compressing objects: 100% (36/36), done.
remote: Total 733 (delta 18), reused 0 (delta 0), pack-reused 694
Receiving objects: 100% (733/733), 191.37 KiB | 1010.00 KiB/s, done.
Resolving deltas: 100% (330/330), done.
Submodule path 'project-spec/meta-dave': checked out 'e944801f104f86191cd086d0cea8f3df88dda061'
Submodule path 'vivado': checked out 'adc46265b1271040f5b69177e69bb1a304407924'
dvdk@vagrant:~$ cd petalinux/vivado/
dvdk@vagrant:~/petalinux/vivado$ source ~/Vivado/2021.2/settings64.sh
dvdk@vagrant:~/petalinux/vivado$ cp -r boards/ ~/Vivado/2021.2/data/.
dvdk@vagrant:~/petalinux/vivado$ vivado -mode tcl -source scripts/recreate_prj_bora_BASE.tcl -notrace -tclargs "gen_bitstream"
****** Vivado v2021.2 (64-bit)
**** SW Build 3367213 on Tue Oct 19 02:47:39 MDT 2021
**** IP Build 3369179 on Thu Oct 21 08:25:16 MDT 2021
** Copyright 1986-2021 Xilinx, Inc. All Rights Reserved.
source scripts/recreate_prj_bora_BASE.tcl -notrace
create_project: Time (s): cpu = 00:00:15 ; elapsed = 00:00:14 . Memory (MB): peak = 2586.273 ; gain = 8.930 ; free physical = 4428 ; free virtual = 8877
WARNING: [BD 41-2576] File '/home/dvdk/petalinux/vivado/bd/bora/ip/bora_processing_system7_0_0/bora_processing_system7_0_0.xci' referenced by design 'bora' could not be found.
INFO: [BD 41-434] Could not find an IP with XCI file by name: bora_processing_system7_0_0
INFO: [BD 41-433]
Design successfully migrated to use XCI files...
WARNING: [BD 41-2670] Found an incomplete address path from address space '/processing_system7_0/Data' to master interface '/processing_system7_0/M_AXI_GP0'. Please either complete or remove this path to resolve.
WARNING: [BD 5-699] No address segments matched 'get_bd_addr_segs -of_objects /processing_system7_0/Data'
Wrote : </home/dvdk/petalinux/vivado/bd/bora/bora.bd>
VHDL Output written to : /home/dvdk/petalinux/vivado/bd/bora/synth/bora.v
VHDL Output written to : /home/dvdk/petalinux/vivado/bd/bora/sim/bora.v
VHDL Output written to : /home/dvdk/petalinux/vivado/bd/bora/hdl/bora_wrapper.v
make_wrapper: Time (s): cpu = 00:00:15 ; elapsed = 00:00:17 . Memory (MB): peak = 2655.059 ; gain = 68.785 ; free physical = 4143 ; free virtual = 8635
INFO: Project created:bora
Generating BITSTREAM
INFO: [BD 41-1662] The design 'bora.bd' is already validated. Therefore parameter propagation will not be re-run.
VHDL Output written to : /home/dvdk/petalinux/vivado/bd/bora/synth/bora.v
VHDL Output written to : /home/dvdk/petalinux/vivado/bd/bora/sim/bora.v
VHDL Output written to : /home/dvdk/petalinux/vivado/bd/bora/hdl/bora_wrapper.v
INFO: [IP_Flow 19-5611] Unable to find an associated reset port for the interface 'M_AXI_GP0'. A default connection has been created.
INFO: [BD 41-1029] Generation completed for the IP Integrator block processing_system7_0 .
Exporting to file /home/dvdk/petalinux/vivado/bd/bora/hw_handoff/bora.hwh
Generated Hardware Definition File /home/dvdk/petalinux/vivado/bd/bora/synth/bora.hwdef
generate_target: Time (s): cpu = 00:00:57 ; elapsed = 00:01:00 . Memory (MB): peak = 2655.059 ; gain = 0.000 ; free physical = 4089 ; free virtual = 8598
[Fri Jan 26 14:41:02 2024] Launched bora_processing_system7_0_0_synth_1, synth_1...
Run output will be captured here:
bora_processing_system7_0_0_synth_1: /home/dvdk/petalinux/vivado/vivado/bora.runs/bora_processing_system7_0_0_synth_1/runme.log
synth_1: /home/dvdk/petalinux/vivado/vivado/bora.runs/synth_1/runme.log
[Fri Jan 26 14:41:03 2024] Launched impl_1...
Run output will be captured here: /home/dvdk/petalinux/vivado/vivado/bora.runs/impl_1/runme.log
launch_runs: Time (s): cpu = 00:00:08 ; elapsed = 00:00:08 . Memory (MB): peak = 2655.133 ; gain = 0.074 ; free physical = 4074 ; free virtual = 8593
[Fri Jan 26 14:41:03 2024] Waiting for impl_1 to finish...
*** Running vivado
with args -log bora_wrapper.vdi -applog -m64 -product Vivado -messageDb vivado.pb -mode batch -source bora_wrapper.tcl -notrace
****** Vivado v2021.2 (64-bit)
**** SW Build 3367213 on Tue Oct 19 02:47:39 MDT 2021
**** IP Build 3369179 on Thu Oct 21 08:25:16 MDT 2021
** Copyright 1986-2021 Xilinx, Inc. All Rights Reserved.
source bora_wrapper.tcl -notrace
create_project: Time (s): cpu = 00:00:14 ; elapsed = 00:00:13 . Memory (MB): peak = 2586.273 ; gain = 8.930 ; free physical = 3752 ; free virtual = 8339
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/home/dvdk/vivado/Vivado/2021.2/data/ip'.
Command: link_design -top bora_wrapper -part xc7z020clg400-1
Design is defaulting to srcset: sources_1
Design is defaulting to constrset: constrs_1
INFO: [Device 21-403] Loading part xc7z020clg400-1
INFO: [Project 1-454] Reading design checkpoint '/home/dvdk/petalinux/vivado/bd/bora/ip/bora_processing_system7_0_0/bora_processing_system7_0_0.dcp' for cell 'bora_i/processing_system7_0'
Netlist sorting complete. Time (s): cpu = 00:00:00.03 ; elapsed = 00:00:00.03 . Memory (MB): peak = 2586.348 ; gain = 0.000 ; free physical = 3423 ; free virtual = 8010
INFO: [Project 1-479] Netlist was created with Vivado 2021.2
INFO: [Project 1-570] Preparing netlist for logic optimization
Parsing XDC File [/home/dvdk/petalinux/vivado/bd/bora/ip/bora_processing_system7_0_0/bora_processing_system7_0_0.xdc] for cell 'bora_i/processing_system7_0/inst'
Finished Parsing XDC File [/home/dvdk/petalinux/vivado/bd/bora/ip/bora_processing_system7_0_0/bora_processing_system7_0_0.xdc] for cell 'bora_i/processing_system7_0/inst'
Parsing XDC File [/home/dvdk/petalinux/vivado/constr/bora_pinout.xdc]
WARNING: [Vivado 12-4702] SLEW is not a supported property on input port(s). Setting is ignored. [/home/dvdk/petalinux/vivado/constr/bora_pinout.xdc:7]
WARNING: [Vivado 12-4702] DRIVE is not a supported property on input port(s). Setting is ignored. [/home/dvdk/petalinux/vivado/constr/bora_pinout.xdc:8]
WARNING: [Vivado 12-4702] SLEW is not a supported property on input port(s). Setting is ignored. [/home/dvdk/petalinux/vivado/constr/bora_pinout.xdc:18]
WARNING: [Vivado 12-4702] DRIVE is not a supported property on input port(s). Setting is ignored. [/home/dvdk/petalinux/vivado/constr/bora_pinout.xdc:19]
Finished Parsing XDC File [/home/dvdk/petalinux/vivado/constr/bora_pinout.xdc]
Parsing XDC File [/home/dvdk/petalinux/vivado/constr/bora_timing.xdc]
Finished Parsing XDC File [/home/dvdk/petalinux/vivado/constr/bora_timing.xdc]
INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2586.348 ; gain = 0.000 ; free physical = 3317 ; free virtual = 7904
INFO: [Project 1-111] Unisim Transformation Summary:
No Unisim elements were transformed.
9 Infos, 4 Warnings, 0 Critical Warnings and 0 Errors encountered.
link_design completed successfully
link_design: Time (s): cpu = 00:00:18 ; elapsed = 00:00:19 . Memory (MB): peak = 2586.348 ; gain = 0.074 ; free physical = 3317 ; free virtual = 7904
Command: opt_design
Attempting to get a license for feature 'Implementation' and/or device 'xc7z020'
INFO: [Common 17-349] Got license for feature 'Implementation' and/or device 'xc7z020'
Running DRC as a precondition to command opt_design
Starting DRC Task
INFO: [DRC 23-27] Running DRC with 2 threads
INFO: [Project 1-461] DRC finished with 0 Errors
INFO: [Project 1-462] Please refer to the DRC report (report_drc) for more information.
Time (s): cpu = 00:00:03 ; elapsed = 00:00:02 . Memory (MB): peak = 2602.281 ; gain = 15.934 ; free physical = 3308 ; free virtual = 7896
Starting Cache Timing Information Task
INFO: [Timing 38-35] Done setting XDC timing constraints.
Ending Cache Timing Information Task | Checksum: 1bdab601e
Time (s): cpu = 00:00:18 ; elapsed = 00:00:19 . Memory (MB): peak = 2602.281 ; gain = 0.000 ; free physical = 2919 ; free virtual = 7520
Starting Logic Optimization Task
Phase 1 Retarget
INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
INFO: [Opt 31-49] Retargeted 0 cell(s).
Phase 1 Retarget | Checksum: 197a7418e
Time (s): cpu = 00:00:00.07 ; elapsed = 00:00:00.16 . Memory (MB): peak = 2833.391 ; gain = 0.000 ; free physical = 2679 ; free virtual = 7282
INFO: [Opt 31-389] Phase Retarget created 0 cells and removed 24 cells
INFO: [Opt 31-1021] In phase Retarget, 1 netlist objects are constrained preventing optimization. Please run opt_design with -debug_log to get more detail.
Phase 2 Constant propagation
INFO: [Opt 31-138] Pushed 0 inverter(s) to 0 load pin(s).
Phase 2 Constant propagation | Checksum: 197a7418e
Time (s): cpu = 00:00:00.08 ; elapsed = 00:00:00.16 . Memory (MB): peak = 2833.391 ; gain = 0.000 ; free physical = 2679 ; free virtual = 7282
INFO: [Opt 31-389] Phase Constant propagation created 0 cells and removed 0 cells
Phase 3 Sweep
Phase 3 Sweep | Checksum: 20041086d
Time (s): cpu = 00:00:00.33 ; elapsed = 00:00:00.42 . Memory (MB): peak = 2833.391 ; gain = 0.000 ; free physical = 2679 ; free virtual = 7282
INFO: [Opt 31-389] Phase Sweep created 0 cells and removed 3 cells
Phase 4 BUFG optimization
Phase 4 BUFG optimization | Checksum: 20041086d
Time (s): cpu = 00:00:00.34 ; elapsed = 00:00:00.44 . Memory (MB): peak = 2833.391 ; gain = 0.000 ; free physical = 2679 ; free virtual = 7282
INFO: [Opt 31-662] Phase BUFG optimization created 0 cells of which 0 are BUFGs and removed 0 cells.
Phase 5 Shift Register Optimization
INFO: [Opt 31-1064] SRL Remap converted 0 SRLs to 0 registers and converted 0 registers of register chains to 0 SRLs
Phase 5 Shift Register Optimization | Checksum: 20041086d
Time (s): cpu = 00:00:00.35 ; elapsed = 00:00:00.44 . Memory (MB): peak = 2833.391 ; gain = 0.000 ; free physical = 2679 ; free virtual = 7282
INFO: [Opt 31-389] Phase Shift Register Optimization created 0 cells and removed 0 cells
Phase 6 Post Processing Netlist
Phase 6 Post Processing Netlist | Checksum: 20041086d
Time (s): cpu = 00:00:00.36 ; elapsed = 00:00:00.45 . Memory (MB): peak = 2833.391 ; gain = 0.000 ; free physical = 2679 ; free virtual = 7282
INFO: [Opt 31-389] Phase Post Processing Netlist created 0 cells and removed 0 cells
Opt_design Change Summary
=========================
-------------------------------------------------------------------------------------------------------------------------
| Phase | #Cells created | #Cells Removed | #Constrained objects preventing optimizations |
-------------------------------------------------------------------------------------------------------------------------
| Retarget | 0 | 24 | 1 |
| Constant propagation | 0 | 0 | 0 |
| Sweep | 0 | 3 | 0 |
| BUFG optimization | 0 | 0 | 0 |
| Shift Register Optimization | 0 | 0 | 0 |
| Post Processing Netlist | 0 | 0 | 0 |
-------------------------------------------------------------------------------------------------------------------------
Starting Connectivity Check Task
Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00 . Memory (MB): peak = 2833.391 ; gain = 0.000 ; free physical = 2679 ; free virtual = 7281
Ending Logic Optimization Task | Checksum: 1d38c9117
Time (s): cpu = 00:00:00.43 ; elapsed = 00:00:00.52 . Memory (MB): peak = 2833.391 ; gain = 0.000 ; free physical = 2679 ; free virtual = 7281
Starting Power Optimization Task
INFO: [Pwropt 34-132] Skipping clock gating for clocks with a period < 2.00 ns.
Ending Power Optimization Task | Checksum: 1d38c9117
Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.02 . Memory (MB): peak = 2837.359 ; gain = 3.969 ; free physical = 2678 ; free virtual = 7281
Starting Final Cleanup Task
Ending Final Cleanup Task | Checksum: 1d38c9117
Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2837.359 ; gain = 0.000 ; free physical = 2678 ; free virtual = 7281
Starting Netlist Obfuscation Task
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2837.359 ; gain = 0.000 ; free physical = 2678 ; free virtual = 7281
Ending Netlist Obfuscation Task | Checksum: 1d38c9117
Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2837.359 ; gain = 0.000 ; free physical = 2678 ; free virtual = 7281
INFO: [Common 17-83] Releasing license: Implementation
27 Infos, 4 Warnings, 0 Critical Warnings and 0 Errors encountered.
opt_design completed successfully
opt_design: Time (s): cpu = 00:00:27 ; elapsed = 00:00:26 . Memory (MB): peak = 2837.359 ; gain = 251.012 ; free physical = 2678 ; free virtual = 7281
INFO: [Timing 38-480] Writing timing data to binary archive.
Writing placer database...
Writing XDEF routing.
Writing XDEF routing logical nets.
Writing XDEF routing special nets.
Write XDEF Complete: Time (s): cpu = 00:00:00.26 ; elapsed = 00:00:00.14 . Memory (MB): peak = 2877.379 ; gain = 0.000 ; free physical = 2672 ; free virtual = 7277
INFO: [Common 17-1381] The checkpoint '/home/dvdk/petalinux/vivado/vivado/bora.runs/impl_1/bora_wrapper_opt.dcp' has been generated.
INFO: [runtcl-4] Executing : report_drc -file bora_wrapper_drc_opted.rpt -pb bora_wrapper_drc_opted.pb -rpx bora_wrapper_drc_opted.rpx
Command: report_drc -file bora_wrapper_drc_opted.rpt -pb bora_wrapper_drc_opted.pb -rpx bora_wrapper_drc_opted.rpx
INFO: [IP_Flow 19-1839] IP Catalog is up to date.
INFO: [Timing 38-35] Done setting XDC timing constraints.
INFO: [DRC 23-27] Running DRC with 2 threads
INFO: [Vivado_Tcl 2-168] The results of DRC are in file /home/dvdk/petalinux/vivado/vivado/bora.runs/impl_1/bora_wrapper_drc_opted.rpt.
report_drc completed successfully
Command: place_design
Attempting to get a license for feature 'Implementation' and/or device 'xc7z020'
INFO: [Common 17-349] Got license for feature 'Implementation' and/or device 'xc7z020'
INFO: [DRC 23-27] Running DRC with 2 threads
INFO: [Vivado_Tcl 4-198] DRC finished with 0 Errors
INFO: [Vivado_Tcl 4-199] Please refer to the DRC report (report_drc) for more information.
Running DRC as a precondition to command place_design
INFO: [DRC 23-27] Running DRC with 2 threads
INFO: [Vivado_Tcl 4-198] DRC finished with 0 Errors
INFO: [Vivado_Tcl 4-199] Please refer to the DRC report (report_drc) for more information.
Starting Placer Task
INFO: [Place 30-611] Multithreading enabled for place_design using a maximum of 2 CPUs
Phase 1 Placer Initialization
Phase 1.1 Placer Initialization Netlist Sorting
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2942.152 ; gain = 0.000 ; free physical = 2650 ; free virtual = 7255
Phase 1.1 Placer Initialization Netlist Sorting | Checksum: 12aa8e666
Time (s): cpu = 00:00:00.01 ; elapsed = 00:00:00.02 . Memory (MB): peak = 2942.152 ; gain = 0.000 ; free physical = 2650 ; free virtual = 7255
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2942.152 ; gain = 0.000 ; free physical = 2650 ; free virtual = 7255
Phase 1.2 IO Placement/ Clock Placement/ Build Placer Device
Phase 1.2 IO Placement/ Clock Placement/ Build Placer Device | Checksum: 18e88cbf6
Time (s): cpu = 00:00:01 ; elapsed = 00:00:01 . Memory (MB): peak = 2942.152 ; gain = 0.000 ; free physical = 2650 ; free virtual = 7259
Phase 1.3 Build Placer Netlist Model
Phase 1.3 Build Placer Netlist Model | Checksum: 1c987dde7
Time (s): cpu = 00:00:01 ; elapsed = 00:00:01 . Memory (MB): peak = 2942.152 ; gain = 0.000 ; free physical = 2652 ; free virtual = 7261
Phase 1.4 Constrain Clocks/Macros
Phase 1.4 Constrain Clocks/Macros | Checksum: 1c987dde7
Time (s): cpu = 00:00:01 ; elapsed = 00:00:01 . Memory (MB): peak = 2942.152 ; gain = 0.000 ; free physical = 2651 ; free virtual = 7262
Phase 1 Placer Initialization | Checksum: 1c987dde7
Time (s): cpu = 00:00:01 ; elapsed = 00:00:01 . Memory (MB): peak = 2942.152 ; gain = 0.000 ; free physical = 2651 ; free virtual = 7262
Phase 2 Final Placement Cleanup
Netlist sorting complete. Time (s): cpu = 00:00:00 ; elapsed = 00:00:00 . Memory (MB): peak = 2942.152 ; gain = 0.000 ; free physical = 2651 ; free virtual = 7262
Time (s): cpu = 00:00:01 ; elapsed = 00:00:01 . Memory (MB): peak = 2942.152 ; gain = 0.000 ; free physical = 2651 ; free virtual = 7262
INFO: [Place 30-281] No place-able instance is found; design doesn't contain any instance or all instances are placed
Ending Placer Task | Checksum: 18e88cbf6
Time (s): cpu = 00:00:01 ; elapsed = 00:00:01 . Memory (MB): peak = 2942.152 ; gain = 0.000 ; free physical = 2651 ; free virtual = 7262
INFO: [Common 17-83] Releasing license: Implementation
44 Infos, 4 Warnings, 0 Critical Warnings and 0 Errors encountered.
place_design completed successfully
INFO: [Timing 38-480] Writing timing data to binary archive.
Writing placer database...
Writing XDEF routing.
Writing XDEF routing logical nets.
Writing XDEF routing special nets.
Write XDEF Complete: Time (s): cpu = 00:00:00.30 ; elapsed = 00:00:00.15 . Memory (MB): peak = 2942.152 ; gain = 0.000 ; free physical = 2647 ; free virtual = 7261
INFO: [Common 17-1381] The checkpoint '/home/dvdk/petalinux/vivado/vivado/bora.runs/impl_1/bora_wrapper_placed.dcp' has been generated.
INFO: [runtcl-4] Executing : report_io -file bora_wrapper_io_placed.rpt
report_io: Time (s): cpu = 00:00:00.37 ; elapsed = 00:00:00.42 . Memory (MB): peak = 2942.152 ; gain = 0.000 ; free physical = 2638 ; free virtual = 7250
INFO: [runtcl-4] Executing : report_utilization -file bora_wrapper_utilization_placed.rpt -pb bora_wrapper_utilization_placed.pb
INFO: [runtcl-4] Executing : report_control_sets -verbose -file bora_wrapper_control_sets_placed.rpt
report_control_sets: Time (s): cpu = 00:00:00.08 ; elapsed = 00:00:00.11 . Memory (MB): peak = 2942.152 ; gain = 0.000 ; free physical = 2649 ; free virtual = 7260
Command: route_design
Attempting to get a license for feature 'Implementation' and/or device 'xc7z020'
INFO: [Common 17-349] Got license for feature 'Implementation' and/or device 'xc7z020'
Running DRC as a precondition to command route_design
INFO: [Timing 38-35] Done setting XDC timing constraints.
INFO: [DRC 23-27] Running DRC with 2 threads
INFO: [Vivado_Tcl 4-198] DRC finished with 0 Errors
INFO: [Vivado_Tcl 4-199] Please refer to the DRC report (report_drc) for more information.
Starting Routing Task
INFO: [Route 35-254] Multithreading enabled for route_design using a maximum of 2 CPUs
Phase 1 Build RT Design
Checksum: PlaceDB: b1aff12d ConstDB: 0 ShapeSum: dcd8dac9 RouteDB: 0
Post Restoration Checksum: NetGraph: 6a47235c NumContArr: 913b0353 Constraints: 0 Timing: 0
Phase 1 Build RT Design | Checksum: fb8226af
Time (s): cpu = 00:01:01 ; elapsed = 00:00:58 . Memory (MB): peak = 3011.688 ; gain = 69.535 ; free physical = 2507 ; free virtual = 7120
Phase 2 Router Initialization
Phase 2.1 Create Timer
Phase 2.1 Create Timer | Checksum: fb8226af
Time (s): cpu = 00:01:01 ; elapsed = 00:00:58 . Memory (MB): peak = 3011.688 ; gain = 69.535 ; free physical = 2508 ; free virtual = 7121
Phase 2.2 Fix Topology Constraints
Phase 2.2 Fix Topology Constraints | Checksum: fb8226af
Time (s): cpu = 00:01:01 ; elapsed = 00:00:59 . Memory (MB): peak = 3011.688 ; gain = 69.535 ; free physical = 2499 ; free virtual = 7112
Phase 2.3 Pre Route Cleanup
Phase 2.3 Pre Route Cleanup | Checksum: fb8226af
Time (s): cpu = 00:01:01 ; elapsed = 00:00:59 . Memory (MB): peak = 3011.688 ; gain = 69.535 ; free physical = 2499 ; free virtual = 7112
Number of Nodes with overlaps = 0
Phase 2.4 Update Timing
Phase 2.4 Update Timing | Checksum: 159c58580
Time (s): cpu = 00:01:01 ; elapsed = 00:00:59 . Memory (MB): peak = 3024.566 ; gain = 82.414 ; free physical = 2489 ; free virtual = 7103
Router Utilization Summary
Global Vertical Routing Utilization = 0 %
Global Horizontal Routing Utilization = 0 %
Routable Net Status*
*Does not include unroutable nets such as driverless and loadless.
Run report_route_status for detailed report.
Number of Failed Nets = 134
(Failed Nets is the sum of unrouted and partially routed nets)
Number of Unrouted Nets = 134
Number of Partially Routed Nets = 0
Number of Node Overlaps = 0
Phase 2 Router Initialization | Checksum: 159c58580
Time (s): cpu = 00:01:02 ; elapsed = 00:00:59 . Memory (MB): peak = 3032.449 ; gain = 90.297 ; free physical = 2487 ; free virtual = 7101
Phase 3 Initial Routing
Phase 3.1 Global Routing
Phase 3.1 Global Routing | Checksum: 159c58580
Time (s): cpu = 00:01:02 ; elapsed = 00:00:59 . Memory (MB): peak = 3032.449 ; gain = 90.297 ; free physical = 2487 ; free virtual = 7101
Number of Nodes with overlaps = 0
Phase 3 Initial Routing | Checksum: 11e2de977
Time (s): cpu = 00:01:02 ; elapsed = 00:00:59 . Memory (MB): peak = 3032.449 ; gain = 90.297 ; free physical = 2489 ; free virtual = 7103
Phase 4 Rip-up And Reroute
Phase 4.1 Global Iteration 0
Phase 4.1 Global Iteration 0 | Checksum: 11e2de977
Time (s): cpu = 00:01:02 ; elapsed = 00:00:59 . Memory (MB): peak = 3032.449 ; gain = 90.297 ; free physical = 2489 ; free virtual = 7103
Phase 4 Rip-up And Reroute | Checksum: 11e2de977
Time (s): cpu = 00:01:02 ; elapsed = 00:00:59 . Memory (MB): peak = 3032.449 ; gain = 90.297 ; free physical = 2489 ; free virtual = 7103
Phase 5 Delay and Skew Optimization
Phase 5.1 Delay CleanUp
Phase 5.1 Delay CleanUp | Checksum: 11e2de977
Time (s): cpu = 00:01:02 ; elapsed = 00:00:59 . Memory (MB): peak = 3032.449 ; gain = 90.297 ; free physical = 2489 ; free virtual = 7103
Phase 5.2 Clock Skew Optimization
Phase 5.2 Clock Skew Optimization | Checksum: 11e2de977
Time (s): cpu = 00:01:02 ; elapsed = 00:00:59 . Memory (MB): peak = 3032.449 ; gain = 90.297 ; free physical = 2489 ; free virtual = 7103
Phase 5 Delay and Skew Optimization | Checksum: 11e2de977
Time (s): cpu = 00:01:02 ; elapsed = 00:00:59 . Memory (MB): peak = 3032.449 ; gain = 90.297 ; free physical = 2489 ; free virtual = 7103
Phase 6 Post Hold Fix
Phase 6.1 Hold Fix Iter
Phase 6.1.1 Update Timing
Phase 6.1.1 Update Timing | Checksum: 11e2de977
Time (s): cpu = 00:01:02 ; elapsed = 00:00:59 . Memory (MB): peak = 3032.449 ; gain = 90.297 ; free physical = 2489 ; free virtual = 7103
Phase 6.1 Hold Fix Iter | Checksum: 11e2de977
Time (s): cpu = 00:01:02 ; elapsed = 00:00:59 . Memory (MB): peak = 3032.449 ; gain = 90.297 ; free physical = 2489 ; free virtual = 7103
Phase 6 Post Hold Fix | Checksum: 11e2de977
Time (s): cpu = 00:01:02 ; elapsed = 00:01:00 . Memory (MB): peak = 3032.449 ; gain = 90.297 ; free physical = 2489 ; free virtual = 7103
Phase 7 Route finalize
Router Utilization Summary
Global Vertical Routing Utilization = 0.0156881 %
Global Horizontal Routing Utilization = 0.0187627 %
Routable Net Status*
*Does not include unroutable nets such as driverless and loadless.
Run report_route_status for detailed report.
Number of Failed Nets = 0
(Failed Nets is the sum of unrouted and partially routed nets)
Number of Unrouted Nets = 0
Number of Partially Routed Nets = 0
Number of Node Overlaps = 0
Phase 7 Route finalize | Checksum: 11e2de977
Time (s): cpu = 00:01:02 ; elapsed = 00:01:00 . Memory (MB): peak = 3032.449 ; gain = 90.297 ; free physical = 2489 ; free virtual = 7103
Phase 8 Verifying routed nets
Verification completed successfully
Phase 8 Verifying routed nets | Checksum: 11e2de977
Time (s): cpu = 00:01:02 ; elapsed = 00:01:00 . Memory (MB): peak = 3032.449 ; gain = 90.297 ; free physical = 2487 ; free virtual = 7101
Phase 9 Depositing Routes
Phase 9 Depositing Routes | Checksum: 11e2de977
Time (s): cpu = 00:01:02 ; elapsed = 00:01:00 . Memory (MB): peak = 3032.449 ; gain = 90.297 ; free physical = 2487 ; free virtual = 7101
Phase 10 Post Router Timing
Phase 10 Post Router Timing | Checksum: 11e2de977
Time (s): cpu = 00:01:02 ; elapsed = 00:01:00 . Memory (MB): peak = 3032.449 ; gain = 90.297 ; free physical = 2487 ; free virtual = 7101
INFO: [Route 35-16] Router Completed Successfully
Time (s): cpu = 00:01:02 ; elapsed = 00:01:00 . Memory (MB): peak = 3032.449 ; gain = 90.297 ; free physical = 2500 ; free virtual = 7114
Routing Is Done.
INFO: [Common 17-83] Releasing license: Implementation
57 Infos, 4 Warnings, 0 Critical Warnings and 0 Errors encountered.
route_design completed successfully
route_design: Time (s): cpu = 00:01:06 ; elapsed = 00:01:02 . Memory (MB): peak = 3032.449 ; gain = 90.297 ; free physical = 2500 ; free virtual = 7114
INFO: [Common 17-600] The following parameters have non-default value.
general.maxThreads
INFO: [Timing 38-480] Writing timing data to binary archive.
Writing placer database...
Writing XDEF routing.
Writing XDEF routing logical nets.
Writing XDEF routing special nets.
Write XDEF Complete: Time (s): cpu = 00:00:00.26 ; elapsed = 00:00:00.15 . Memory (MB): peak = 3046.391 ; gain = 0.000 ; free physical = 2496 ; free virtual = 7113
INFO: [Common 17-1381] The checkpoint '/home/dvdk/petalinux/vivado/vivado/bora.runs/impl_1/bora_wrapper_routed.dcp' has been generated.
INFO: [runtcl-4] Executing : report_drc -file bora_wrapper_drc_routed.rpt -pb bora_wrapper_drc_routed.pb -rpx bora_wrapper_drc_routed.rpx
Command: report_drc -file bora_wrapper_drc_routed.rpt -pb bora_wrapper_drc_routed.pb -rpx bora_wrapper_drc_routed.rpx
INFO: [IP_Flow 19-1839] IP Catalog is up to date.
INFO: [DRC 23-27] Running DRC with 2 threads
INFO: [Vivado_Tcl 2-168] The results of DRC are in file /home/dvdk/petalinux/vivado/vivado/bora.runs/impl_1/bora_wrapper_drc_routed.rpt.
report_drc completed successfully
INFO: [runtcl-4] Executing : report_methodology -file bora_wrapper_methodology_drc_routed.rpt -pb bora_wrapper_methodology_drc_routed.pb -rpx bora_wrapper_methodology_drc_routed.rpx
Command: report_methodology -file bora_wrapper_methodology_drc_routed.rpt -pb bora_wrapper_methodology_drc_routed.pb -rpx bora_wrapper_methodology_drc_routed.rpx
INFO: [Timing 38-35] Done setting XDC timing constraints.
INFO: [DRC 23-133] Running Methodology with 2 threads
INFO: [Vivado_Tcl 2-1520] The results of Report Methodology are in file /home/dvdk/petalinux/vivado/vivado/bora.runs/impl_1/bora_wrapper_methodology_drc_routed.rpt.
report_methodology completed successfully
INFO: [runtcl-4] Executing : report_power -file bora_wrapper_power_routed.rpt -pb bora_wrapper_power_summary_routed.pb -rpx bora_wrapper_power_routed.rpx
Command: report_power -file bora_wrapper_power_routed.rpt -pb bora_wrapper_power_summary_routed.pb -rpx bora_wrapper_power_routed.rpx
INFO: [Timing 38-35] Done setting XDC timing constraints.
Running Vector-less Activity Propagation...
Finished Running Vector-less Activity Propagation
70 Infos, 4 Warnings, 0 Critical Warnings and 0 Errors encountered.
report_power completed successfully
INFO: [runtcl-4] Executing : report_route_status -file bora_wrapper_route_status.rpt -pb bora_wrapper_route_status.pb
INFO: [runtcl-4] Executing : report_timing_summary -max_paths 10 -file bora_wrapper_timing_summary_routed.rpt -pb bora_wrapper_timing_summary_routed.pb -rpx bora_wrapper_timing_summary_routed.rpx -warn_on_violation
INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -1, Delay Type: min_max.
INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 2 CPUs
INFO: [runtcl-4] Executing : report_incremental_reuse -file bora_wrapper_incremental_reuse_routed.rpt
INFO: [Vivado_Tcl 4-1062] Incremental flow is disabled. No incremental reuse Info to report.
INFO: [runtcl-4] Executing : report_clock_utilization -file bora_wrapper_clock_utilization_routed.rpt
INFO: [runtcl-4] Executing : report_bus_skew -warn_on_violation -file bora_wrapper_bus_skew_routed.rpt -pb bora_wrapper_bus_skew_routed.pb -rpx bora_wrapper_bus_skew_routed.rpx
INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -1, Delay Type: min_max.
INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 2 CPUs
Command: write_bitstream -force bora_wrapper.bit
Attempting to get a license for feature 'Implementation' and/or device 'xc7z020'
INFO: [Common 17-349] Got license for feature 'Implementation' and/or device 'xc7z020'
Running DRC as a precondition to command write_bitstream
INFO: [IP_Flow 19-1839] IP Catalog is up to date.
INFO: [DRC 23-27] Running DRC with 2 threads
INFO: [Vivado 12-3199] DRC finished with 0 Errors
INFO: [Vivado 12-3200] Please refer to the DRC report (report_drc) for more information.
INFO: [Designutils 20-2272] Running write_bitstream with 2 threads.
Loading data files...
Loading site data...
Loading route data...
Processing options...
Creating bitmap...
Creating bitstream...
Writing bitstream ./bora_wrapper.bit...
INFO: [Vivado 12-1842] Bitgen Completed Successfully.
INFO: [Project 1-1876] WebTalk data collection is mandatory when using a ULT device. To see the specific WebTalk data collected for your design, open the usage_statistics_webtalk.html or usage_statistics_webtalk.xml file in the implementation directory.
INFO: [Common 17-83] Releasing license: Implementation
12 Infos, 0 Warnings, 0 Critical Warnings and 0 Errors encountered.
write_bitstream completed successfully
write_bitstream: Time (s): cpu = 00:00:25 ; elapsed = 00:00:21 . Memory (MB): peak = 3404.168 ; gain = 352.906 ; free physical = 2464 ; free virtual = 7089
INFO: [Common 17-206] Exiting Vivado at Fri Jan 26 14:47:18 2024...
[Fri Jan 26 14:47:19 2024] impl_1 finished
wait_on_runs: Time (s): cpu = 00:06:42 ; elapsed = 00:06:16 . Memory (MB): peak = 2655.133 ; gain = 0.000 ; free physical = 3984 ; free virtual = 8608
Command: write_cfgmem -format BIN -size 16 -interface SMAPx32 -disablebitswap -loadbit {up 0x0 /home/dvdk/petalinux/vivado/vivado/bora.runs/impl_1/bora_wrapper.bit} /home/dvdk/petalinux/vivado/vivado/bora.runs/impl_1/bora_wrapper.bin
Creating config memory files...
INFO: [Writecfgmem 68-23] Start address provided has been multiplied by a factor of 4 due to the use of interface SMAPX32.
Creating bitstream load up from address 0x00000000
Loading bitfile /home/dvdk/petalinux/vivado/vivado/bora.runs/impl_1/bora_wrapper.bit
Writing file /home/dvdk/petalinux/vivado/vivado/bora.runs/impl_1/bora_wrapper.bin
Writing log file /home/dvdk/petalinux/vivado/vivado/bora.runs/impl_1/bora_wrapper.prm
===================================
Configuration Memory information
===================================
File Format BIN
Interface SMAPX32
Size 16M
Start Address 0x00000000
End Address 0x00FFFFFF
Addr1 Addr2 Date File(s)
0x00000000 0x003DBAFB Jan 26 14:47:18 2024 /home/dvdk/petalinux/vivado/vivado/bora.runs/impl_1/bora_wrapper.bit
6 Infos, 3 Warnings, 0 Critical Warnings and 0 Errors encountered.
write_cfgmem completed successfully
Write BITSTREAM Done!!!!
INFO: [Vivado 12-4895] Creating Hardware Platform: /home/dvdk/petalinux/vivado/vivado/bora.xsa ...
WARNING: [Project 1-645] Board images not set in Hardware Platform.
INFO: [Vivado 12-12464] The Hardware Platform can be used for Hardware
INFO: [Vivado 12-4896] Successfully created Hardware Platform: /home/dvdk/petalinux/vivado/vivado/bora.xsa
write_hw_platform: Time (s): cpu = 00:00:09 ; elapsed = 00:00:09 . Memory (MB): peak = 2655.133 ; gain = 0.000 ; free physical = 3934 ; free virtual = 8571
INFO: [Hsi 55-2053] elapsed time for repository (/home/dvdk/vivado/Vivado/2021.2/data/embeddedsw) loading 1 seconds
DONE!
INFO: [Common 17-206] Exiting Vivado at Fri Jan 26 14:47:31 2024...
dvdk@vagrant:~/petalinux/vivado$ ls -la vivado/
bora.cache/ bora.hw/ bora.ip_user_files/ bora.runs/ bora.srcs/ bora.xpr bora.xsa .gitignore
dvdk@vagrant:~/petalinux/vivado$
Installing Petalinux[edit | edit source]
|
Petalinux building in the MVM requires large amount of resources: it is strongly suggested to use a build server |
For installing Petalinux, please follow the steps here below
- download
petalinux-v2021.2-final-installer.runfrom official Xilinx download page and copy the file in theMVM. TheXilinx-2021.2directory has been created for this purposes. The version used inDESK-XZ7-L-1.0.1isPetalinux 2021.2
- change the file permission and run it
dvdk@vagrant:~$ chmod u+x Xilinx-2021.2/petalinux-v2021.2-final-installer.run
- create the Petalinux directory
dvdk@vagrant:~$ mkdir Petalinux dvdk@vagrant:~$ cd Petalinux
- run
petalinux-v2021.2-final-installer.runfile
dvdk@vagrant:~/Petalinux$ ../Xilinx-2021.2/petalinux-v2021.2-final-installer.run INFO: Checking installation environment requirements... WARNING: This is not a supported OS INFO: Checking free disk space INFO: Checking installed tools INFO: Checking installed development libraries INFO: Checking network and other services INFO: Checking installer checksum... INFO: Extracting PetaLinux installer... LICENSE AGREEMENTS PetaLinux SDK contains software from a number of sources. Please review the following licenses and indicate your acceptance of each to continue. You do not have to accept the licenses, however if you do not then you may not use PetaLinux SDK. Use PgUp/PgDn to navigate the license viewer, and press 'q' to close Press Enter to display the license agreements Do you accept Xilinx End User License Agreement? [y/N] > y Do you accept Third Party End User License Agreement? [y/N] > y INFO: Installing PetaLinux... ********************************************* WARNING: You haven't specified the installation location. ********************************************* ********************************************* WARNING: By default, it will be installed in your working directory: /home/dvdk/Petalinux ********************************************* Please input "y" to proceed the installation, "n" to exit otherwise:y ********************************************* WARNING: PetaLinux installation directory: /home/dvdk/Petalinux/. is not empty! ********************************************* Please input "y" to continue to install PetaLinux in that directory?[n]y INFO: Checking PetaLinux installer integrity... INFO: Installing PetaLinux SDK to "/home/dvdk/Petalinux/." INFO: Installing buildtools in /home/dvdk/Petalinux/./components/yocto/buildtools INFO: Installing buildtools-extended in /home/dvdk/Petalinux/./components/yocto/buildtools_extended INFO: PetaLinux SDK has been installed to /home/dvdk/Petalinux/.
Example of building wic image with Petalinux[edit | edit source]
Here below there is an example of build an wic image, with Petalinux using the result of previous reported Vivado example
dvdk@vagrant:~/petalinux$ source Petalinux/settings.sh
PetaLinux environment set to '/home/dvdk/Petalinux'
WARNING: /bin/sh is not bash!
bash is PetaLinux recommended shell. Please set your default shell to bash.
WARNING: This is not a supported OS
INFO: Checking free disk space
INFO: Checking installed tools
INFO: Checking installed development libraries
INFO: Checking network and other services
dvdk@vagrant:~/petalinux$ cp project-spec/configs/config_bora project-spec/configs/config
dvdk@vagrant:~/petalinux$ petalinux-config --get-hw-description vivado/vivado/bora.xsa --silentconfig
[INFO] Sourcing buildtools
INFO: Getting hardware description...
INFO: Renaming bora.xsa to system.xsa
[INFO] Generating Kconfig for project
[INFO] Silentconfig project
[INFO] Extracting yocto SDK to components/yocto. This may take time!
[INFO] Sourcing build environment
[INFO] Generating kconfig for Rootfs
[INFO] Silentconfig rootfs
[INFO] Generating plnxtool conf
[INFO] Adding user layers
[INFO] Generating workspace directory
dvdk@vagrant:~/petalinux$ petalinux-build
[INFO] Sourcing buildtools
[INFO] Building project
[INFO] Sourcing build environment
[INFO] Generating workspace directory
INFO: bitbake petalinux-image-minimal
NOTE: Started PRServer with DBfile: /home/dvdk/petalinux/build/cache/prserv.sqlite3, IP: 127.0.0.1, PORT: 37455, PID: 10346
Loading cache: 100% |#########################################################################################################################################################| Time: 0:00:00
Loaded 128 entries from dependency cache.
Parsing recipes: 100% |#######################################################################################################################################################| Time: 0:06:45
Parsing of 3495 .bb files complete (84 cached, 3411 parsed). 5156 targets, 268 skipped, 0 masked, 0 errors.
NOTE: Resolving any missing task queue dependencies
NOTE: Fetching uninative binary shim file:///home/dvdk/petalinux/components/yocto/downloads/uninative/5ec5a9276046e7eceeac749a18b175667384e1f445cd4526300a41404d985a5b/x86_64-nativesdk-libc.tar.xz;sha256sum=5ec5a9276046e7eceeac749a18b175667384e1f445cd4526300a41404d985a5b (will check PREMIRRORS first)
Initialising tasks: 100% |####################################################################################################################################################| Time: 0:00:21
Checking sstate mirror object availability: 100% |############################################################################################################################| Time: 0:02:55
Sstate summary: Wanted 3053 Found 2247 Missed 806 Current 0 (73% match, 0% complete)
NOTE: Executing Tasks
WARNING: fetchmail-6.4.4-r0 do_fetch: Failed to fetch URL https://downloads.sourceforge.net/fetchmail/fetchmail-6.4.4.tar.xz, attempting MIRRORS if available
WARNING: fb-test-1.1.0-r0 do_fetch: Failed to fetch URL git://github.com/prpplague/fb-test-app.git, attempting MIRRORS if available
WARNING: stressapptest-1.0.9-r0 do_fetch: Failed to fetch URL git://github.com/stressapptest/stressapptest, attempting MIRRORS if available
NOTE: Tasks Summary: Attempted 8596 tasks of which 3438 didn't need to be rerun and all succeeded.
Summary: There were 3 WARNING messages shown.
INFO: Successfully copied built images to tftp dir: /tftpboot
[INFO] Successfully built project
dvdk@vagrant:~/petalinux$ petalinux-package --boot --u-boot --force
[INFO] Sourcing buildtools
INFO: Getting system flash information...
INFO: File in BOOT BIN: "/home/dvdk/petalinux/images/linux/zynq_fsbl.elf"
INFO: File in BOOT BIN: "/home/dvdk/petalinux/project-spec/hw-description/bora.bit"
INFO: File in BOOT BIN: "/home/dvdk/petalinux/images/linux/u-boot.elf"
INFO: File in BOOT BIN: "/home/dvdk/petalinux/images/linux/system.dtb"
INFO: Generating zynq binary package BOOT.BIN...
****** Xilinx Bootgen v2021.2
**** Build date : Sep 30 2021-06:08:18
** Copyright 1986-2021 Xilinx, Inc. All Rights Reserved.
[INFO] : Bootimage generated successfully
INFO: Binary is ready.
dvdk@vagrant:~/petalinux$ petalinux-package --wic --bootfiles "BOOT.BIN boot.scr image.ub"
INFO: Sourcing build environment
INFO: Extracting rootfs, This may take time!
INFO: Creating wic image...
INFO: wic create /home/dvdk/petalinux/build/rootfs.wks --rootfs-dir /home/dvdk/petalinux/build/wic/rootfs --bootimg-dir /home/dvdk/petalinux/images/linux/ --kernel-dir /home/dvdk/petalinux/images/linux/ --outdir /tmp/tmp.SA1rPLWljr -n /home/dvdk/petalinux/build/tmp/work/cortexa9t2hf-neon-xilinx-linux-gnueabi/wic-tools/1.0-r0/recipe-sysroot-native
INFO: Creating image(s)...
WARNING: bootloader config not specified, using defaults
INFO: The new image(s) can be found here:
/tmp/tmp.SA1rPLWljr/rootfs-202401291016-mmcblk0.direct
The following build artifacts were used to create the image(s):
ROOTFS_DIR: /home/dvdk/petalinux/build/wic/rootfs
BOOTIMG_DIR: /home/dvdk/petalinux/images/linux/
KERNEL_DIR: /home/dvdk/petalinux/images/linux/
NATIVE_SYSROOT: /home/dvdk/petalinux/build/tmp/work/cortexa9t2hf-neon-xilinx-linux-gnueabi/wic-tools/1.0-r0/recipe-sysroot-native
INFO: The image(s) were created using OE kickstart file:
/home/dvdk/petalinux/build/rootfs.wks
dvdk@vagrant:~/petalinux$ cd images/linux/
dvdk@vagrant:~/petalinux/images/linux$ ls -la
total 2997788
drwxrwxr-x 3 dvdk dvdk 4096 Jan 29 11:16 .
drwxrwxr-x 3 dvdk dvdk 4096 Jan 26 15:53 ..
-rw-rw-r-- 1 dvdk dvdk 5101800 Jan 29 11:15 BOOT.BIN
-rw-rw-r-- 1 dvdk dvdk 254 Jan 29 11:15 bootgen.bif
-rw-r--r-- 1 dvdk dvdk 2709 Jan 26 19:15 boot.scr
-rw-r--r-- 1 dvdk dvdk 8216 Jan 26 15:12 config
-rw-r--r-- 1 dvdk dvdk 4868616 Jan 26 19:14 image.ub
-rw-r--r-- 1 dvdk dvdk 6442455040 Jan 29 11:16 petalinux-sdimage.wic
drwxr-xr-x 2 dvdk dvdk 4096 Jan 26 19:15 pxelinux.cfg
-rw-r--r-- 1 dvdk dvdk 558668800 Jan 26 19:35 rootfs.cpio
-rw-r--r-- 1 dvdk dvdk 224547582 Jan 26 19:35 rootfs.cpio.gz
-rw-r--r-- 1 dvdk dvdk 224547646 Jan 26 19:35 rootfs.cpio.gz.u-boot
-rw-r--r-- 1 dvdk dvdk 799854592 Jan 26 19:35 rootfs.ext4
-rw-r--r-- 1 dvdk dvdk 287571968 Jan 26 19:35 rootfs.jffs2
-rw-r--r-- 1 dvdk dvdk 61379 Jan 26 19:32 rootfs.manifest
-rw-r--r-- 1 dvdk dvdk 226472880 Jan 26 19:35 rootfs.tar.gz
-rw-r--r-- 1 dvdk dvdk 4045672 Jan 26 15:12 system.bit
-rw-r--r-- 1 dvdk dvdk 20776 Jan 26 15:53 system.dtb
-rwxr-xr-x 1 dvdk dvdk 931196 Jan 26 18:19 u-boot.bin
-rw-r--r-- 1 dvdk dvdk 951972 Jan 26 18:19 u-boot-dtb.bin
-rw-r--r-- 1 dvdk dvdk 1017932 Jan 26 18:19 u-boot-dtb.elf
-rwxr-xr-x 1 dvdk dvdk 7441276 Jan 26 18:19 u-boot.elf
-rw-r--r-- 1 dvdk dvdk 4846008 Jan 26 19:14 uImage
-rw-r--r-- 1 dvdk dvdk 14418152 Jan 26 19:14 vmlinux
-rw-r--r-- 1 dvdk dvdk 4845944 Jan 26 19:14 zImage
-rw-r--r-- 1 dvdk dvdk 510880 Jan 26 19:16 zynq_fsbl.elf
dvdk@vagrant:~/petalinux/images/linux$
