DESK-XZ7-L/Development/Creating and building the Vivado project

History
Issue Date	Notes
2022/11/15	DESK-XZ7-L-1.0.0-rc1 release
2024/01/25	DESK-XZ7-L-1.0.1 release

Creating and building the Vivado project

The Vivado repository allows to:

• track hardware/fpga related sources/configuration
• reproduce hardware design output (FPGA bitstream, XSA) using TCL scripts

Development kit TCL scripts supported are the following one:

Script	Boot
recreate_prj_bora.tcl	uSD and QSPI-NOR
recreate_prj_borax_BASE.tcl	uSD and QSPI-NOR
recreate_prj_boralite_BASE.tcl	uSD and QSPI-NOR
recreate_prj_boralite_NAND.tcl	uSD and NAND

As an example, to reproduce the build for the Bora platform, here below are the steps:

• clone the repository:

git clone git@git.dave.eu:desk-xz-l/vivado.git -b desk-xz7-l-1.0.1
cd vivado

or clone the Vivado repository when you clone Petalinux repository

git clone --recursive git@git.dave.eu:desk-xz-l/petalinux.git -b desk-xz7-l-1.0.1
cd petalinux/vivado

• (only once as first tools setup) copy Bora hardware definition into Vivado installation path:

cp -r boards/ /opt/Xilinx/2021.2/Vivado/2021.2/data/

• lunch Vivado Design Suite with the following commands and parameters:

source /opt/Xilinx/2021.2/Vivado/2021.2/settings64.sh
vivado -mode tcl -source scripts/recreate_prj_bora_BASE.tcl -notrace -tclargs "gen_bitstream"

• at the end of the bitstream build process, the script automatically exports the Xilinx Support Archive (XSA) hardware design
  • the Vivado project vivado/bora.xpr is ready for customization through the Vivado GUI
  • the bitstream files are
    • vivado/bora.runs/impl_1/bora_wrapper.bit
    • vivado/bora.runs/impl_1/bora_wrapper.bin
  • the hardware design file vivado/bora.xsa is ready for the import into Petalinux