Difference between revisions of "DESK-XZ7-L/Development/Creating and building the Vivado project"
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| + | {{ImportantMessage|text=Vivado installation path, in this case, is in <code>/opt</code> directory. If you have chosen another one, use it correctly. The commands below were performed on a build server running Ubuntu 20.04.}} | ||
== Creating and building the Vivado project == | == Creating and building the Vivado project == | ||
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* (only once as first tools setup) copy ''Bora'' hardware definition into Vivado installation path: | * (only once as first tools setup) copy ''Bora'' hardware definition into Vivado installation path: | ||
<syntaxhighlight lang="bash"> | <syntaxhighlight lang="bash"> | ||
| − | cp -r boards/ | + | cp -r boards/ <vivado directory installation>/Xilinx/2021.2/Vivado/2021.2/data/ |
</syntaxhighlight> | </syntaxhighlight> | ||
* lunch Vivado Design Suite with the following commands and parameters: | * lunch Vivado Design Suite with the following commands and parameters: | ||
<syntaxhighlight lang="bash"> | <syntaxhighlight lang="bash"> | ||
| − | source | + | source <vivado directory installation>/Xilinx/2021.2/Vivado/2021.2/settings64.sh |
vivado -mode tcl -source scripts/recreate_prj_bora_BASE.tcl -notrace -tclargs "gen_bitstream" | vivado -mode tcl -source scripts/recreate_prj_bora_BASE.tcl -notrace -tclargs "gen_bitstream" | ||
</syntaxhighlight> | </syntaxhighlight> | ||
Revision as of 16:39, 29 January 2024
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| Issue Date | Notes | ||
| 2022/11/15 | DESK-XZ7-L-1.0.0-rc1 release | ||
| 2024/01/25 | DESK-XZ7-L-1.0.1 release | ||
 Vivado installation path, in this case, is in |
Creating and building the Vivado project[edit | edit source]
The Vivado repository allows to:
- track hardware/fpga related sources/configuration
- reproduce hardware design output (FPGA bitstream, XSA) using TCL scripts
Development kit TCL scripts supported are the following one:
| Script | Boot |
|---|---|
recreate_prj_bora.tcl
|
uSD and QSPI-NOR |
recreate_prj_borax_BASE.tcl
|
uSD and QSPI-NOR |
recreate_prj_boralite_BASE.tcl
|
uSD and QSPI-NOR |
recreate_prj_boralite_NAND.tcl
|
uSD and NAND |
As an example, to reproduce the build for the Bora platform, here below are the steps:
- clone the repository:
git clone git@git.dave.eu:desk-xz-l/vivado.git -b desk-xz7-l-1.0.1
cd vivado
or clone the Vivado repository when you clone Petalinux repository
git clone --recursive git@git.dave.eu:desk-xz-l/petalinux.git -b desk-xz7-l-1.0.1
cd petalinux/vivado
- (only once as first tools setup) copy Bora hardware definition into Vivado installation path:
cp -r boards/ <vivado directory installation>/Xilinx/2021.2/Vivado/2021.2/data/
- lunch Vivado Design Suite with the following commands and parameters:
source <vivado directory installation>/Xilinx/2021.2/Vivado/2021.2/settings64.sh
vivado -mode tcl -source scripts/recreate_prj_bora_BASE.tcl -notrace -tclargs "gen_bitstream"
- at the end of the bitstream build process, the script automatically exports the Xilinx Support Archive (XSA) hardware design
- the Vivado project
vivado/bora.xpris ready for customization through the Vivado GUI - the bitstream files are
vivado/bora.runs/impl_1/bora_wrapper.bitvivado/bora.runs/impl_1/bora_wrapper.bin
- the hardware design file
vivado/bora.xsais ready for the import into Petalinux
- the Vivado project
CAN0 and UART0 routing example project[edit | edit source]
The following pictures show a simple PL design used to route PS' CAN0 and UART0 signals through EMIO.
