Difference between revisions of "DESK-XZ7-L/Development/Creating and building the Vivado project"

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__FORCETOC__
 
__FORCETOC__
 
<section begin=Body/>
 
<section begin=Body/>
 +
 +
{{ImportantMessage|text=Vivado installation path, in this documentation, is the <code>/opt</code> directory. If you have chosen a different one, set it properly. The commands reported here below have been used on a native server running Ubuntu 20.04.}}
 +
  
 
== Creating and building the Vivado project ==
 
== Creating and building the Vivado project ==
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* reproduce hardware design output (FPGA bitstream, XSA) using TCL scripts
 
* reproduce hardware design output (FPGA bitstream, XSA) using TCL scripts
  
−
To reproduce the build, user just need to:
+
Development kit TCL scripts supported are the following one:
 +
 
 +
{| class="wikitable"
 +
|-
 +
! Script
 +
! Boot
 +
|-
 +
| <code>recreate_prj_bora.tcl</code>
 +
| uSD and QSPI-NOR
 +
|-
 +
| <code>recreate_prj_borax_BASE.tcl</code>
 +
| uSD and QSPI-NOR
 +
|-
 +
| <code>recreate_prj_boralite_BASE.tcl</code>
 +
| uSD and QSPI-NOR
 +
|-
 +
| <code>recreate_prj_boralite_NAND.tcl</code>
 +
| uSD and NAND
 +
|}
 +
 
 +
As an example, to reproduce the build for the ''Bora'' platform, here below are the steps:
 
* clone the repository:
 
* clone the repository:
 
<syntaxhighlight lang="bash">
 
<syntaxhighlight lang="bash">
−
git clone git@git.dave.eu:sdv12/vivado.git -b desk-xz7-l-rel-1.0.0
+
git clone git@git.dave.eu:desk-xz-l/vivado.git -b desk-xz7-l-1.0.1
 
cd vivado
 
cd vivado
 
</syntaxhighlight>
 
</syntaxhighlight>
−
* (only once as first tools setup) copy Bora hardware definition into Vivado installation.:
+
 
 +
or clone the Vivado repository when you clone Petalinux repository
 +
 
 
<syntaxhighlight lang="bash">
 
<syntaxhighlight lang="bash">
−
cp -r boards/ /opt/Xilinx/2021.2/Vivado/2021.2/data/
+
git clone --recursive git@git.dave.eu:desk-xz-l/petalinux.git -b desk-xz7-l-1.0.1
 +
cd petalinux/vivado
 
</syntaxhighlight>
 
</syntaxhighlight>
−
* lunch Vivado Design Suite with the following command:
+
 
 +
* (only once as first tools setup) copy ''Bora'' hardware definition into Vivado installation path:
 
<syntaxhighlight lang="bash">
 
<syntaxhighlight lang="bash">
−
source /opt/Xilinx/2021.2/Vivado/2021.2/settings64.sh
+
cp -r boards/ <vivado directory installation>/Xilinx/2021.2/Vivado/2021.2/data/
 +
</syntaxhighlight>
 +
* lunch Vivado Design Suite with the following commands and parameters:
 +
<syntaxhighlight lang="bash">
 +
source <vivado directory installation>/Xilinx/2021.2/Vivado/2021.2/settings64.sh
 
vivado -mode tcl -source scripts/recreate_prj_bora_BASE.tcl -notrace -tclargs "gen_bitstream"
 
vivado -mode tcl -source scripts/recreate_prj_bora_BASE.tcl -notrace -tclargs "gen_bitstream"
 
</syntaxhighlight>
 
</syntaxhighlight>
−
* at the end of bitstream build process, the script automatically exports hardware
+
* at the end of the bitstream build process, the script automatically exports the Xilinx Support Archive ('''XSA''') hardware design
−
** The Vivado project ready for customization through Vivado GUI is available into <code>vivado/bora.xpr</code>
+
** the Vivado project <code>vivado/bora.xpr</code> is ready for customization through the Vivado GUI
−
** The bitstream file is now present in
+
** the bitstream files are
 
*** <code>vivado/bora.runs/impl_1/bora_wrapper.bit</code>
 
*** <code>vivado/bora.runs/impl_1/bora_wrapper.bit</code>
 
*** <code>vivado/bora.runs/impl_1/bora_wrapper.bin</code>
 
*** <code>vivado/bora.runs/impl_1/bora_wrapper.bin</code>
−
** The hardware export, ready for import into Petalinux, is available in <code>vivado/bora.xsa</code>
+
** the hardware design file <code>vivado/bora.xsa</code> is ready for the import into Petalinux
 +
 
 +
=== CAN0 and UART0 routing example project ===
 +
 
 +
The following pictures show a simple PL design used to route PS' CAN0 and UART0 signals through EMIO.
 +
 
 +
[[File:Belk-default-vivado-project.png|thumb|center|400px|Block diagram of BORA example project]]
 +
[[File:Belk-borax-default-vivado-project.png|thumb|center|400px|Block diagram of BORA Xpress example project]]
 +
[[File:Boralite-default-vivado-project.png|thumb|center|400px|Block diagram of BORA Lite example project]]
 +
 
 
<section end=Body/>
 
<section end=Body/>
  
−
----
+
[[Category:BORA]] [[Category:BORA Xpress]][[Category:BORA Lite]]
−
 
 
−
[[Category:BORA]]
 

Latest revision as of 17:24, 29 January 2024

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History
Issue Date Notes
2022/11/15 DESK-XZ7-L-1.0.0-rc1 release
2024/01/25 DESK-XZ7-L-1.0.1 release



200px-Emblem-important.svg.png

Vivado installation path, in this documentation, is the /opt directory. If you have chosen a different one, set it properly. The commands reported here below have been used on a native server running Ubuntu 20.04.


Creating and building the Vivado project[edit | edit source]

The Vivado repository allows to:

  • track hardware/fpga related sources/configuration
  • reproduce hardware design output (FPGA bitstream, XSA) using TCL scripts

Development kit TCL scripts supported are the following one:

Script Boot
recreate_prj_bora.tcl uSD and QSPI-NOR
recreate_prj_borax_BASE.tcl uSD and QSPI-NOR
recreate_prj_boralite_BASE.tcl uSD and QSPI-NOR
recreate_prj_boralite_NAND.tcl uSD and NAND

As an example, to reproduce the build for the Bora platform, here below are the steps:

  • clone the repository:
git clone git@git.dave.eu:desk-xz-l/vivado.git -b desk-xz7-l-1.0.1
cd vivado

or clone the Vivado repository when you clone Petalinux repository 

git clone --recursive git@git.dave.eu:desk-xz-l/petalinux.git -b desk-xz7-l-1.0.1
cd petalinux/vivado
  • (only once as first tools setup) copy Bora hardware definition into Vivado installation path:
cp -r boards/ <vivado directory installation>/Xilinx/2021.2/Vivado/2021.2/data/
  • lunch Vivado Design Suite with the following commands and parameters:
source <vivado directory installation>/Xilinx/2021.2/Vivado/2021.2/settings64.sh
vivado -mode tcl -source scripts/recreate_prj_bora_BASE.tcl -notrace -tclargs "gen_bitstream"
  • at the end of the bitstream build process, the script automatically exports the Xilinx Support Archive (XSA) hardware design
    • the Vivado project vivado/bora.xpr is ready for customization through the Vivado GUI
    • the bitstream files are
      • vivado/bora.runs/impl_1/bora_wrapper.bit
      • vivado/bora.runs/impl_1/bora_wrapper.bin
    • the hardware design file vivado/bora.xsa is ready for the import into Petalinux

CAN0 and UART0 routing example project[edit | edit source]

The following pictures show a simple PL design used to route PS' CAN0 and UART0 signals through EMIO.

Block diagram of BORA example project
Block diagram of BORA Xpress example project
Block diagram of BORA Lite example project


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