Difference between revisions of "BoraEVB"
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The following picture shows Bora-EVB block diagram: | The following picture shows Bora-EVB block diagram: | ||
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== Features == | == Features == | ||
Revision as of 13:45, 24 March 2014
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The information here provided are preliminary and subject to change. |
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[[File:|400px|frameless|border]]
Contents
Introduction[edit | edit source]
BoraEVB is a carrier board designed to host Bora system-on-module.
Block Diagram[edit | edit source]
The following picture shows Bora-EVB block diagram:
Features[edit | edit source]
- 10/100/1000 Ethernet
- 1x USB OTG
- Serial port (RS232)
- 1x MicroSD
- External DDR3 SDRAM bank
- +12V power connector
- JTAG
- 2.54mm-pitch pin-strip connectors for Bora PS and PL configurable peripherals (MIO and EMIO interfaces, GPIOs, custom IPs, ..)
Known limitations[edit | edit source]
Connectors pinout[edit | edit source]
Schematics[edit | edit source]
- ORCAD: Coming soon
- PDF : Coming soon
BOM[edit | edit source]
- BoraEVB: Coming soon
Layout[edit | edit source]
- Coming soon
Mechanical[edit | edit source]
- DXF: coming soon
- IDF (3D): coming soon
