Difference between revisions of "BELK-TN-012: Using XADC signal module"

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(Pins usage)
(Reference Voltage Input)
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* the [https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842132/XADC Xilinx Atlassian's XADC Linux drivers] illustrating how to access the XADC module from a software perspective
 
* the [https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842132/XADC Xilinx Atlassian's XADC Linux drivers] illustrating how to access the XADC module from a software perspective
  
== Reference Voltage Input ==
+
== Electrical notes ==
 +
From an electrical perspective,  in regard to the XADC module [[BORA SOM |BORA]], [[BORA Xpress SOM |BORA Xpress]], and [[BORA Lite SOM |BORA Lite]] SoMs implement the same scheme, which is depicted in the following image.
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[[File:Zynq-7000-XADC-reference.png|center|thumb|519x519px]]
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As suggested in the [https://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf#page=16 UG480 page 16]:
 
As suggested in the [https://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf#page=16 UG480 page 16]:
  
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</pre>
 
</pre>
  
the VREFP pad is internally connected to a 10ppm/°C 1.25V voltage reference in the [[BORA SOM |BORA]], [[BORA Xpress SOM |BORA Xpress]] and [[BORA Lite SOM |BORA Lite]] SoMs
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the VREFP pad is internally connected to a 10ppm/°C 1.25V voltage reference in the  
  
 
== Pins usage==
 
== Pins usage==

Revision as of 10:24, 26 January 2022

Info Box
Bora5-small.jpg Applies to Bora
BORA Xpress.png Applies to BORA Xpress
BORALite-TOP.png Applies to BORA Lite


Warning-icon.png This technical note was validated against specific versions of hardware and software. What is described here may not work with other versions. Warning-icon.png

History[edit | edit source]

Version Date BELK/BXELK version Notes
1.0.0 Dec 2021 4.1.0 First release

Introduction[edit | edit source]

This technical note provides some information for using the XADC module available on the Zynq-7000 family which is the SoC used in BORA, BORA Xpress and BORA Lite DAVE Embedded Systems' SOMs.

Reference[edit | edit source]

First of all, we suggest some references regarding the XADC module:

Electrical notes[edit | edit source]

From an electrical perspective, in regard to the XADC module BORA, BORA Xpress, and BORA Lite SoMs implement the same scheme, which is depicted in the following image.

Zynq-7000-XADC-reference.png

As suggested in the UG480 page 16:

This pin can be tied to an external 1.25V accurate reference IC ±0.2%

the VREFP pad is internally connected to a 10ppm/°C 1.25V voltage reference in the

Pins usage[edit | edit source]

The pins like IO_L1N_T0_AD0N / IO_L1P_T0_AD0P can be used as analog inputs: according to Xilinx nomenclature, these pins are indicated as “External Voltages” or “External Analog Inputs”.

Software configuration[edit | edit source]

For enabling the ADC channel, the device tree file has to include the proper entry, for example the ADC_0 channel is enabled the bora.dts

&adc {
	xlnx,channels {
		#address-cells = <1>;
		#size-cells = <0>;
		channel@0 {
			reg = <0>;
		};
	};
};

then, the related ADC channel can be read from sysfs with the analog value reported in the form raw/scale:

root@bora:~# cat /sys/devices/soc0/amba/f8007100.adc/iio\:device0/in_voltage0_vccint_raw
1348
root@bora:~# cat /sys/devices/soc0/amba/f8007100.adc/iio\:device0/in_voltage0_vccint_scale
0.732421875
root@bora:~#

that is the corresponding value:

1348 * 0.732421875 = 987.3046875 mV

The SoC temperature can be read too:

root@bora:~# cat /sys/devices/soc0/amba/f8007100.adc/iio\:device0/in_temp0_raw
2660
root@bora:~# cat /sys/devices/soc0/amba/f8007100.adc/iio\:device0/in_temp0_offset
-2219
root@bora:~# cat /sys/devices/soc0/amba/f8007100.adc/iio\:device0/in_temp0_scale
123.040771484
root@bora:~#

i.e.

((2660 - 2219)* 123.040771484)/1000 = 54.26°C