Difference between revisions of "AXEL ULite SOM/AXEL ULite Evaluation Kit/Interfaces and Connectors/LVDS"

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==LVDS interface ==
 
==LVDS interface ==
 
''TBD: sostituire le sezioni con le informazioni sull'uso della periferica e del suo connettore''
 
''Nell'esempio di seguito c'è la descrizione dell'interfaccia UART/console''
 
  
 
=== Description  ===
 
=== Description  ===
  
The LVDS interface available on the Evaluation Kit at the connector ''TBD:Jxxx''.  
+
The LVDS interface available on the Evaluation Kit at the connector J20. J20 is a Hirose (cod. DF13A-20DP-1.25V) double row 1.25mm pitch miniature crimping connector
  
''Jxx'' is a ''TBD:connector-type'' header connector for the RS232 two-wires UART3 port, used for debug purposes (bootloader and operating system serial console).
+
The [[AXEL ULite SOM/AXEL ULite Evaluation Kit | AXEL ULite Evaluation Kit]] provides a 18-bit LVDS interface.
  
  
[[File:{{{nome-som}}-EVB-LVDS-connector.png|thumb|center|500px|LVDS connector]]
+
[[File:AXEL_ULite-EVB-LVDS-connector.png|thumb|center|500px|LVDS connector]]
  
 
===Signals ===
 
===Signals ===
  
The following table describes the interface signals:
+
The LVDS is generated, starting from the RGB i.MX6UL SOC, with a RGB-to-LVDS [https://www.ti.com/lit/ds/symlink/ds90c385a.pdf DS90C385A] LVDS transmitter. For the RGB pin mapping, please refer to the [[AXEL_ULite_SOM/AXEL_ULite_Hardware/Peripherals/RGB | AXEL_ULite ]] RGB interface description.
 +
 
 +
 
 +
The following tables describes the interface signals:
  
 
{| class="wikitable"  
 
{| class="wikitable"  
 
! latexfontsize="scriptsize"| Pin#
 
! latexfontsize="scriptsize"| Pin#
! latexfontsize="scriptsize"| SOM Pin#
 
 
! latexfontsize="scriptsize"| Pin name
 
! latexfontsize="scriptsize"| Pin name
 
! latexfontsize="scriptsize"| Pin function
 
! latexfontsize="scriptsize"| Pin function
! latexfontsize="scriptsize"| Pin Notes
 
 
|-
 
|-
|1,2,4,6,,7,8,10
+
| 1, 2 || 3.3V_LCD || 3.3 V LCD PSU
| -
 
| N.A.
 
| N.C.
 
| Not connected
 
 
|-
 
|-
| 3
+
| 3, 4, 7, 10,
| J1.189
+
13, 16, 19
| RS232_RX
+
| - || Ground
| Receive line
 
|  
 
 
|-
 
|-
| 3
+
| 5 || LVDS_TX0_N || LVDS Data 0 -
| J1.187
 
| RS232_TX
 
| Transmit line
 
|  
 
 
|-
 
|-
| 9
+
| 6 || LVDS_TX0_P || LVDS Data 0 +
| -
+
|-
| DGND
+
| 8 || LVDS_TX1_N || LVDS Data 1 -
| Ground
+
|-
|  
+
| 9 || LVDS_TX1_P || LVDS Data 1 +
 +
|-
 +
| 11 || LVDS_TX2_N || LVDS Data 2 -
 +
|-
 +
| 12 || LVDS_TX2_P || LVDS Data 2 +
 +
|-
 +
| 14 || LVDS_CLK_N || LVDS Clock -
 +
|-
 +
| 15 || LVDS_CLK_P || LVDS Clock +
 +
|-
 +
| 17 || PWM || backlight PWM control
 +
|-
 +
| 18 || 5V || backlight 5V PSU
 +
|-
 +
| 19 || GPIO || 3V3 or GND (mount option, default = GND)
 +
|-
 +
| 20 || BL_EN || backlight enable
 
|}
 
|}
  
 
=== Device mapping ===
 
=== Device mapping ===
UART3 is mapped to <code>/dev/ttymxc2</code> device in Linux. The peripheral is used as the default serial console, both for the bootloader and the kernel.
+
* LVDS is mapped to <code>/dev/fb0</code> device in Linux
 
 
=== Device usage ===
 
 
 
To connect to the debug serial port:
 
 
 
# connect the DB9 adapter bracket to the J22 connector on the SBCX board
 
# connect a serial cable between DB9 connector and PC COM port through a NULL-modem cable (not provided)
 
# start your favorite terminal emulator software on PC (eg: PuTTY); communication parameters are: 115200,N,8,1
 
  
 
----
 
----
  
 
[[Category:AXEL ULite]]
 
[[Category:AXEL ULite]]

Revision as of 12:46, 19 July 2021

History
Version Issue Date Notes
1.0.0 Jul 2021 First DESK release


LVDS interface[edit | edit source]

Description[edit | edit source]

The LVDS interface available on the Evaluation Kit at the connector J20. J20 is a Hirose (cod. DF13A-20DP-1.25V) double row 1.25mm pitch miniature crimping connector

The AXEL ULite Evaluation Kit provides a 18-bit LVDS interface.


LVDS connector

Signals[edit | edit source]

The LVDS is generated, starting from the RGB i.MX6UL SOC, with a RGB-to-LVDS DS90C385A LVDS transmitter. For the RGB pin mapping, please refer to the AXEL_ULite RGB interface description.


The following tables describes the interface signals:

Pin# Pin name Pin function
1, 2 3.3V_LCD 3.3 V LCD PSU
3, 4, 7, 10,

13, 16, 19

- Ground
5 LVDS_TX0_N LVDS Data 0 -
6 LVDS_TX0_P LVDS Data 0 +
8 LVDS_TX1_N LVDS Data 1 -
9 LVDS_TX1_P LVDS Data 1 +
11 LVDS_TX2_N LVDS Data 2 -
12 LVDS_TX2_P LVDS Data 2 +
14 LVDS_CLK_N LVDS Clock -
15 LVDS_CLK_P LVDS Clock +
17 PWM backlight PWM control
18 5V backlight 5V PSU
19 GPIO 3V3 or GND (mount option, default = GND)
20 BL_EN backlight enable

Device mapping[edit | edit source]

  • LVDS is mapped to /dev/fb0 device in Linux