Difference between revisions of "AXEL ULite SOM/AXEL ULite Evaluation Kit/Interfaces and Connectors/JTAG"

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!colspan="4" style="width:100%; text-align:left"; border-bottom:solid 2px #ededed"|History
 
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__FORCETOC__
 
<section begin=Body/>
 
<section begin=Body/>
  
 
==JTAG interface ==
 
==JTAG interface ==
−
 
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''TBD: sostituire le sezioni con le informazioni sull'uso della periferica e del suo connettore''
 
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''Nell'esempio di seguito c'è la descrizione dell'interfaccia UART/console''
 
  
 
=== Description  ===
 
=== Description  ===
  
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The JTAG interface available on the Evaluation Kit at the connector ''TBD:Jxxx''.  
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The JTAG interface available on the Evaluation Kit at the connector JD1. By default, the connector is not populated.
  
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''Jxx'' is a ''TBD:connector-type'' header connector for the RS232 two-wires UART3 port, used for debug purposes (bootloader and operating system serial console).
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JD1 is a 10x2.54mm header connector for the JTAG signals used for debug purposes togheter with a JTAG debugger.
  
  
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[[File:{{{nome-som}}-EVB-JTAG-connector.png|thumb|center|500px|JTAG connector]]
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[[File:AXEL_ULite-EVB-JTAG-connector.png|thumb|center|500px|JTAG connector]]
  
 
===Signals ===
 
===Signals ===
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{| class="wikitable"  
 
{| class="wikitable"  
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! latexfontsize="scriptsize"| Pin#
 
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! latexfontsize="scriptsize"| SOM Pin#
 
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! latexfontsize="scriptsize"| Pin name
 
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! latexfontsize="scriptsize"| Pin function
 
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! latexfontsize="scriptsize"| Pin Notes
 
 
|-
 
|-
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|1,2,4,6,,7,8,10
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!Pin#
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| -
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!Pin name
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| N.A.
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!Function
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| N.C.
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!Notes
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| Not connected
 
 
|-
 
|-
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| 3
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|JD1.1 || DGND || - || -
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| J1.189
 
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| RS232_RX
 
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| Receive line
 
−
|  
 
 
|-
 
|-
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| 3
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|JD1.2 || JTAG_TCK || - || -
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| J1.187
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|-
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| RS232_TX
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|JD1.3 || JTAG_TMS || - || -
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| Transmit line
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|-
−
|  
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|JD1.4 || JTAG_TDO || - || -
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|-
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|JD1.5 || JTAG_TDI || - || -
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|-
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|JD1.6 || JTAG_nTRST || - || optionally connected (mount option)
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|-
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|JD1.7 || CPU_PORn || - || optionally connected (mount option)
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|-
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|JD1.8 || N.C. || - || -
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|-
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|JD1.9 || N.C. || - || -
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|-
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|JD1.10 || JTAG_VREF || - || 3V3 (SOM_PGOOD driven signal)
 
|-
 
|-
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| 9
 
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| -
 
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| DGND
 
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| Ground
 
−
|
 
 
|}
 
|}
  
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=== Device mapping ===
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<section end=Body/>
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UART3 is mapped to <code>/dev/ttymxc2</code> device in Linux. The peripheral is used as the default serial console, both for the bootloader and the kernel.
 
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=== Device usage ===
 
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To connect to the debug serial port:
 
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# connect the DB9 adapter bracket to the J22 connector on the SBCX board
 
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# connect a serial cable between DB9 connector and PC COM port through a NULL-modem cable (not provided)
 
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# start your favorite terminal emulator software on PC (eg: PuTTY); communication parameters are: 115200,N,8,1
 
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----
 
  
 
[[Category:AXEL ULite]]
 
[[Category:AXEL ULite]]

Latest revision as of 10:27, 9 January 2024

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History
Issue Date Notes
2021/07/19 First EVK release



JTAG interface[edit | edit source]

Description[edit | edit source]

The JTAG interface available on the Evaluation Kit at the connector JD1. By default, the connector is not populated.

JD1 is a 10x2.54mm header connector for the JTAG signals used for debug purposes togheter with a JTAG debugger.


JTAG connector

Signals[edit | edit source]

The following table describes the interface signals:

Pin# Pin name Function Notes
JD1.1 DGND - -
JD1.2 JTAG_TCK - -
JD1.3 JTAG_TMS - -
JD1.4 JTAG_TDO - -
JD1.5 JTAG_TDI - -
JD1.6 JTAG_nTRST - optionally connected (mount option)
JD1.7 CPU_PORn - optionally connected (mount option)
JD1.8 N.C. - -
JD1.9 N.C. - -
JD1.10 JTAG_VREF - 3V3 (SOM_PGOOD driven signal)


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