AXEL ULite SOM/AXEL ULite Evaluation Kit/Interfaces and Connectors/JTAG

From DAVE Developer's Wiki
Jump to: navigation, search
Version Issue Date Notes
1.0.0 Jul 2021 First DESK release

JTAG interface[edit | edit source]

Description[edit | edit source]

The JTAG interface available on the Evaluation Kit at the connector JD1. By default, the connector is not populated.

JD1 is a 10x2.54mm header connector for the JTAG signals used for debug purposes togheter with a JTAG debugger.

JTAG connector

Signals[edit | edit source]

The following table describes the interface signals:

Pin# Pin name Function Notes
JD1.1 DGND - -
JD1.2 JTAG_TCK - -
JD1.3 JTAG_TMS - -
JD1.4 JTAG_TDO - -
JD1.5 JTAG_TDI - -
JD1.6 JTAG_nTRST - optionally connected (mount option)
JD1.7 CPU_PORn - optionally connected (mount option)
JD1.8 N.C. - -
JD1.9 N.C. - -
JD1.10 JTAG_VREF - 3V3 (SOM_PGOOD driven signal)