Difference between revisions of "AURA SOM/Part number composition"

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| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | Preliminary information
 
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | Preliminary information
 
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!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000"| {{oldid|17886|31/08/2023}}
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!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000"| 31/08/2023
 
!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000"|Official release
 
!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000"|Official release
 
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|Dual Core
 
|Dual Core
 
|Tj: (-40+105)
 
|Tj: (-40+105)
−
|FCPBGA, Rev.1.0, Full Feature(sample)
+
|Full Feature(sample)
 
|-
 
|-
 
|B: MIMX9352DVVxMAB
 
|B: MIMX9352DVVxMAB
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|Dual Core
 
|Dual Core
 
|Tj: (0+95)
 
|Tj: (0+95)
−
|FCPBGA, Rev.2.0, Full Feature(MP)
+
|Full Feature
 
|-
 
|-
 
|C: MIMX9352CVVxMAB
 
|C: MIMX9352CVVxMAB
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|Dual Core
 
|Dual Core
 
|Tj: (-40+105)
 
|Tj: (-40+105)
−
|FCPBGA, Rev.2.0, Full Feature(MP)
+
|Full Feature
 
|-
 
|-
 
|D: MIMX9352XVVxMAB
 
|D: MIMX9352XVVxMAB
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|Dual Core
 
|Dual Core
 
|Tj: (-40+125)
 
|Tj: (-40+125)
−
|FCPBGA, Rev.2.0, Full Feature(MP)
+
|Full Feature
 
|-
 
|-
 
|E: MIMX9351DVVxMAB
 
|E: MIMX9351DVVxMAB
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|Single Core
 
|Single Core
 
|Tj: (0+95)
 
|Tj: (0+95)
−
|FCPBGA, Rev.2.0, Full Feature(MP)
+
|Full Feature
 
|-
 
|-
 
|F: MIMX9351CVVxMAB
 
|F: MIMX9351CVVxMAB
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|Single Core
 
|Single Core
 
|Tj: (-40+105)
 
|Tj: (-40+105)
−
|FCPBGA, Rev.2.0, Full Feature(MP)
+
|Full Feature
 
|-
 
|-
 
|G: MIMX9351XVVxMAB
 
|G: MIMX9351XVVxMAB
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|Single Core
 
|Single Core
 
|Tj: (-40+125)
 
|Tj: (-40+125)
−
|FCPBGA, Rev.2.0, Full Feature(MP)
+
|Full Feature
 
|-
 
|-
 
|H: MIMX9332DVVxMAB
 
|H: MIMX9332DVVxMAB
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|Dual Core
 
|Dual Core
 
|Tj: (0+95)
 
|Tj: (0+95)
−
|FCPBGA, Rev.2.0, No NPU (MP)
+
|No NPU
 
|-
 
|-
 
|I: MIMX9332CVVxMAB
 
|I: MIMX9332CVVxMAB
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|Dual Core
 
|Dual Core
 
|Tj: (-40+105)
 
|Tj: (-40+105)
−
|FCPBGA, Rev.2.0, No NPU (MP)
+
|No NPU
 
|-
 
|-
 
|J: MIMX9332XVVxMAB
 
|J: MIMX9332XVVxMAB
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|Dual Core
 
|Dual Core
 
|Tj: (-40+125)
 
|Tj: (-40+125)
−
|FCPBGA, Rev.2.0, No NPU (MP)
+
|No NPU
 
|-
 
|-
 
|K: MIMX9331DVVxMAB
 
|K: MIMX9331DVVxMAB
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|Single Core
 
|Single Core
 
|Tj: (0+95)
 
|Tj: (0+95)
−
|FCPBGA, Rev.2.0, No NPU (MP)
+
|No NPU
 
|-
 
|-
 
|L: MIMX9331CVVxMAB
 
|L: MIMX9331CVVxMAB
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|Single Core
 
|Single Core
 
|Tj: (-40+105)
 
|Tj: (-40+105)
−
|FCPBGA, Rev.2.0, No NPU (MP)
+
|No NPU
 
|-
 
|-
 
|M: MIMX9331XVVxMAB
 
|M: MIMX9331XVVxMAB
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|Single Core
 
|Single Core
 
|Tj: (-40+125)
 
|Tj: (-40+125)
−
|FCPBGA, Rev.2.0, No NPU (MP)
+
|No NPU
 
|-
 
|-
 
|N: MIMX9302DVVxDAB
 
|N: MIMX9302DVVxDAB
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|Dual Core
 
|Dual Core
 
|Tj: (0+95)
 
|Tj: (0+95)
−
|FCPBGA, Rev.2.0, Reduced Features (MP)
+
|Reduced Features
 
|-
 
|-
 
|O: MIMX9302CVVxDAB
 
|O: MIMX9302CVVxDAB
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|Dual Core
 
|Dual Core
 
|Tj: (-40+105)
 
|Tj: (-40+105)
−
|FCPBGA, Rev.2.0, Reduced Features (MP)
+
|Reduced Features
 
|-
 
|-
 
|P: MIMX9301DVVxDAB
 
|P: MIMX9301DVVxDAB
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|Single Core
 
|Single Core
 
|Tj: (0+95)
 
|Tj: (0+95)
−
|FCPBGA, Rev.2.0, Reduced Features (MP)
+
|Reduced Features
 
|-
 
|-
 
|Q: MIMX9301CVVxDAB
 
|Q: MIMX9301CVVxDAB
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|Single Core
 
|Single Core
 
|Tj: (-40+105)
 
|Tj: (-40+105)
−
|FCPBGA, Rev.2.0, Reduced Features (MP)
+
|Reduced Features
 
|}
 
|}
 
*
 
*

Revision as of 10:28, 31 August 2023

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History
Issue Date Notes

15/05/2023

Preliminary information
31/08/2023 Official release


Part number composition[edit | edit source]

AURA SOM module part number is identified by the following digit-code table:

Part number structure Options Description
Family DAU Family prefix code
SOC
A: PIMX9352CVUXMAA 1.7GHz Dual Core Tj: (-40+105) Full Feature(sample)
B: MIMX9352DVVxMAB 1.7GHz Dual Core Tj: (0+95) Full Feature
C: MIMX9352CVVxMAB 1.7GHz Dual Core Tj: (-40+105) Full Feature
D: MIMX9352XVVxMAB 1.7GHz Dual Core Tj: (-40+125) Full Feature
E: MIMX9351DVVxMAB 1.7GHz Single Core Tj: (0+95) Full Feature
F: MIMX9351CVVxMAB 1.7GHz Single Core Tj: (-40+105) Full Feature
G: MIMX9351XVVxMAB 1.7GHz Single Core Tj: (-40+125) Full Feature
H: MIMX9332DVVxMAB 1.7GHz Dual Core Tj: (0+95) No NPU
I: MIMX9332CVVxMAB 1.7GHz Dual Core Tj: (-40+105) No NPU
J: MIMX9332XVVxMAB 1.7GHz Dual Core Tj: (-40+125) No NPU
K: MIMX9331DVVxMAB 1.7GHz Single Core Tj: (0+95) No NPU
L: MIMX9331CVVxMAB 1.7GHz Single Core Tj: (-40+105) No NPU
M: MIMX9331XVVxMAB 1.7GHz Single Core Tj: (-40+125) No NPU
N: MIMX9302DVVxDAB 900 MHz Dual Core Tj: (0+95) Reduced Features
O: MIMX9302CVVxDAB 900 MHz Dual Core Tj: (-40+105) Reduced Features
P: MIMX9301DVVxDAB 900 MHz Single Core Tj: (0+95) Reduced Features
Q: MIMX9301CVVxDAB 900 MHz Single Core Tj: (-40+105) Reduced Features
These options depends on NXP P/N description available here. Other versions can be available, please contact technical support
RAM
  • 1: 1GB LPDDR4
  • 2: 2GB LPDDR4
Storage

eMMC/NAND/QSPI

  • 0: No Storage on board
  • 1: 16MB NOR SPI, 8GB eMMC
  • 2: 256MB NAND, 8GB eMMC
  • 3: 8GB eMMC, no NAND/NOR (SD3 available)
  • 4: 256MB NAND, no eMMC (SD1 available)
  • 5: 4GB eMMC, no NAND/NOR (SD3 available)
  • 6: 16MB NOR SPI, 4GB eMMC
 SPI NOR and NAND are alternatives mounting options
Boot Mode:
  • 0: on board SPI NOR
  • 1: on board eMMC
  • 2: on board SPI NAND
RFU
  • 0: RFU
RFU
  • 0: RFU
Temperature range
  • C - Commercial grade: suitable for 0-70°C envirronment
  • I - Industrial grade: suitable for 40 - 85°C envirronment
PCB revision
  • 0: first version
 PCB release may change for manufacturing purposes (i.e. text fixture adaptation)
Manufacturing option
  • R: RoHS compliant
 typically connected to production process and quality
Software Configuration -00: standard factory u-boot pre-programmed If customers require custom SW deployed this section should be defined and agreed. Please contact technical support

Example[edit | edit source]

AURA SOM code DAUA13100I0R-00

  • A -
  • 1 - 1GB LPDDR4
  • 3 - 8GB eMMC
  • 1 - eMMC boot
  • 0 - RFU
  • 0 - RFU
  • I - Industrial grade: -40 to +85°C
  • 0 - first version
  • R - RoHS compliant
  • -00 -
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