Difference between revisions of "AURA SOM/AURA Hardware/Power and Reset/Power Supply Unit (PSU) and recommended power-up sequence"
< AURA SOM | AURA Hardware
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== Power Supply Unit (PSU) and recommended power-up sequence == | == Power Supply Unit (PSU) and recommended power-up sequence == | ||
| − | Implementing correct power-up sequence for | + | Implementing correct power-up sequence for i.MX93 SOC processors is not a trivial task because several power rails are involved. |
AURA SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry: | AURA SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry: | ||
| Line 27: | Line 27: | ||
The PSU: | The PSU: | ||
* generates the proper power-up sequence required by the SOC processor and surrounding memories and peripherals | * generates the proper power-up sequence required by the SOC processor and surrounding memories and peripherals | ||
| − | * synchronizes the powering up of carrier board | + | * synchronizes the powering up of carrier board to prevent back power |
* provides some spare regulated voltages that can be used to power carrier board devices | * provides some spare regulated voltages that can be used to power carrier board devices | ||
=== Power-up sequence=== | === Power-up sequence=== | ||
| + | The typical power-up sequence is the following: | ||
| − | + | * 3.3VIN main power supply rail is powered | |
| + | * SNVS domain signals are pulled up (unless carrier board circuitry keeps this signal low for any reason) | ||
| + | * CPU_PORn (active-low) is driven low by PMIC | ||
| + | * RTC_RESET_B are internally released after 10ms | ||
| + | * PMIC initiates power-up sequence needed by iMX93x processor | ||
| + | * SOM_PGOOD goes up when all CPU I/O power rail is ready | ||
| + | * CPU_PORn is de-asserted after the last regulator to bring the processor out of reset | ||
| − | ==== Note on | + | ==== Note on SOM_PGOOD usage ==== |
| − | + | SOM_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals. | |
| − | + | Depending on the kind of such loads, SOM_PGOOD might not be able to drive them properly. In these cases a simple 2-input AND port can be used to address this issue. The following picture depicts a principle schematic showing this solution. | |
| − | |||
| − | Depending on the kind of such loads, | ||
VDD_SOM denotes the power rail used to power AURA SoM. | VDD_SOM denotes the power rail used to power AURA SoM. | ||
[[File:AURA-power-good.png]] | [[File:AURA-power-good.png]] | ||
| − | |||
<section end=Body/> | <section end=Body/> | ||
[[Category:AURA]] | [[Category:AURA]] | ||
Revision as of 17:10, 2 February 2024
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Contents
Power Supply Unit (PSU) and recommended power-up sequence[edit | edit source]
Implementing correct power-up sequence for i.MX93 SOC processors is not a trivial task because several power rails are involved.
AURA SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry:
The PSU is composed of two main blocks:
- power management integrated circuit
- additional generic power management circuitry that completes PMIC functionalities
The PSU:
- generates the proper power-up sequence required by the SOC processor and surrounding memories and peripherals
- synchronizes the powering up of carrier board to prevent back power
- provides some spare regulated voltages that can be used to power carrier board devices
Power-up sequence[edit | edit source]
The typical power-up sequence is the following:
- 3.3VIN main power supply rail is powered
- SNVS domain signals are pulled up (unless carrier board circuitry keeps this signal low for any reason)
- CPU_PORn (active-low) is driven low by PMIC
- RTC_RESET_B are internally released after 10ms
- PMIC initiates power-up sequence needed by iMX93x processor
- SOM_PGOOD goes up when all CPU I/O power rail is ready
- CPU_PORn is de-asserted after the last regulator to bring the processor out of reset
Note on SOM_PGOOD usage[edit | edit source]
SOM_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals.
Depending on the kind of such loads, SOM_PGOOD might not be able to drive them properly. In these cases a simple 2-input AND port can be used to address this issue. The following picture depicts a principle schematic showing this solution.
VDD_SOM denotes the power rail used to power AURA SoM.
