AURA SOM/AURA Hardware/Power and Reset/Power Supply Unit (PSU) and recommended power-up sequence

History
Issue Date	Notes
2024/02/14	First documentation release

Power Supply Unit (PSU) and recommended power-up sequence

This page provides an overview of the issues related to powering AURA SOM. For more details about the signals that are involved, please see also this page

Implementing a correct power-up sequence for i.MX93 SoC processors is not a trivial task because several power rails are involved.

AURA SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry:

The PSU is composed of two main blocks:

• power management integrated circuit (PMIC)
• additional generic power management circuitry that completes PMIC functionalities.

The PSU:

• generates the proper power-up sequence required by the SoC, surrounding memories, and peripherals
• synchronizes the powering up of carrier board's circuitry to prevent back powering.

Power-up sequence

The typical power-up sequence is the following:

1. VIN_SOM (+3.3V) main power supply rail is powered.
2. CPU_PORn (active-low) is driven low by PMIC; PMIC initiates power-up sequence needed by iMX93x processor.
3. SOM_PGOOD goes up when all SoC, memories, and I/O power rails are ready.
4. Finally PMIC releases CPU_PORn; this signal brings the processor out of reset.

Note on SOM_PGOOD usage

SOM_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals in order to prevent back power.

Depending on the kind of such loads, SOM_PGOOD might not be able to drive them properly. On AURA SOM this signal is driven by a push-pull output at NVCC_3V3 rail, with max 20 mA output current.

Note on CPU_PORn

Internally to the SOM, CPU_PORn is pulled-up with 100 kOhm.