Difference between revisions of "AURA SOM/AURA Hardware/Power and Reset/Power Supply Unit (PSU) and recommended power-up sequence"
< AURA SOM | AURA Hardware
m (→Power Supply Unit (PSU) and recommended power-up sequence) |
|||
| (7 intermediate revisions by 2 users not shown) | |||
| Line 1: | Line 1: | ||
| − | <section begin=History/> | + | <section begin="History" /> |
{| style="border-collapse:collapse; " | {| style="border-collapse:collapse; " | ||
| − | !colspan="4" style="width:100%; text-align:left"; border-bottom:solid 2px #ededed"|History | + | ! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History |
|- | |- | ||
| − | !style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Issue Date | + | ! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date |
| − | !style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Notes | + | ! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes |
|- | |- | ||
| − | |style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"| | + | | style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |2024/02/dd |
| − | |style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"| | + | | style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |First documentation release |
|- | |- | ||
|} | |} | ||
| − | <section end=History/> | + | <section end="History" /> |
__FORCETOC__ | __FORCETOC__ | ||
| − | <section begin=Body/> | + | <section begin="Body" /> |
| + | |||
| + | [[File:TBD.png | center | 400px]] | ||
== Power Supply Unit (PSU) and recommended power-up sequence == | == Power Supply Unit (PSU) and recommended power-up sequence == | ||
| − | Implementing correct power-up sequence for | + | Implementing correct power-up sequence for i.MX93 SoC processors is not a trivial task because several power rails are involved. |
AURA SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry: | AURA SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry: | ||
| Line 22: | Line 24: | ||
The PSU is composed of two main blocks: | The PSU is composed of two main blocks: | ||
| − | * power management integrated circuit | + | * power management integrated circuit (PMIC) |
* additional generic power management circuitry that completes PMIC functionalities | * additional generic power management circuitry that completes PMIC functionalities | ||
The PSU: | The PSU: | ||
| − | * generates the proper power-up sequence required by the | + | * generates the proper power-up sequence required by the SoC processor and surrounding memories and peripherals |
| − | * synchronizes the powering up of carrier board | + | * synchronizes the powering up of carrier board to prevent back power |
| − | |||
=== Power-up sequence=== | === Power-up sequence=== | ||
| + | The typical power-up sequence is the following: | ||
| − | + | # VIN_SOM (+3.3V) main power supply rail is powered | |
| − | + | # CPU_PORn (active-low) is driven low by PMIC; PMIC initiates power-up sequence needed by iMX93x processor | |
| − | + | # SOM_PGOOD goes up when all CPU, memories and I/O power rail is ready | |
| − | + | # finally PMIC releases CPU_PORn; this signal bring the processor out of reset | |
| − | |||
| − | + | ==== Note on SOM_PGOOD usage ==== | |
| − | + | SOM_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals in order to prevent back power. | |
| − | + | Depending on the kind of such loads, SOM_PGOOD might not be able to drive them properly. On AURA SOM this signal is driven by a push-pull output at NVCC_3V3 rail, with max 20 mA current. | |
| − | + | ==== Note on CPU_PORn ==== | |
| + | Internally to the SOM, CPU_PORn is pulled-up with 100 kohm to NVCC_BBSM_1V8 rail. | ||
| − | <section end=Body/> | + | <section end="Body" /> |
[[Category:AURA]] | [[Category:AURA]] | ||
Revision as of 07:24, 13 February 2024
| HOME | SOMs | SBCs | ToloMEO Embedded Assistant |  GET A QUOTE
|
 ONLINE HELPDESK
|
| Roadmap | IoT Services | ML/AI services | Embedded Design Services |
| History | |||
|---|---|---|---|
| Issue Date | Notes | ||
| 2024/02/dd | First documentation release | ||
Contents
Power Supply Unit (PSU) and recommended power-up sequence[edit | edit source]
Implementing correct power-up sequence for i.MX93 SoC processors is not a trivial task because several power rails are involved.
AURA SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry:
The PSU is composed of two main blocks:
- power management integrated circuit (PMIC)
- additional generic power management circuitry that completes PMIC functionalities
The PSU:
- generates the proper power-up sequence required by the SoC processor and surrounding memories and peripherals
- synchronizes the powering up of carrier board to prevent back power
Power-up sequence[edit | edit source]
The typical power-up sequence is the following:
- VIN_SOM (+3.3V) main power supply rail is powered
- CPU_PORn (active-low) is driven low by PMIC; PMIC initiates power-up sequence needed by iMX93x processor
- SOM_PGOOD goes up when all CPU, memories and I/O power rail is ready
- finally PMIC releases CPU_PORn; this signal bring the processor out of reset
Note on SOM_PGOOD usage[edit | edit source]
SOM_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals in order to prevent back power.
Depending on the kind of such loads, SOM_PGOOD might not be able to drive them properly. On AURA SOM this signal is driven by a push-pull output at NVCC_3V3 rail, with max 20 mA current.
Note on CPU_PORn[edit | edit source]
Internally to the SOM, CPU_PORn is pulled-up with 100 kohm to NVCC_BBSM_1V8 rail.
