Difference between revisions of "AURA SOM/Part number composition"

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! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
 
! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History
 
|-  
 
|-  
 +
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |ID#
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Issue Date
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes
 
|-
 
|-
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | {{oldid|17886|2023/05/17}}
+
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" |{{oldid|17886|17886}}
 +
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | 15/05/2023
 
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | Preliminary information
 
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | Preliminary information
|-
 
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | {{oldid|18662|2023/08/31}}
 
| style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000" | Official release
 
|-
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" | 2024/02/09
 
! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#ededed; padding:5px; color:#000000" | Added more details about P/N structure.
 
 
|}
 
|}
<section end="History" />__FORCETOC__<section begin="Body" />
+
<section end="History" />
 +
__FORCETOC__
 +
<section begin="Body" />
  
 +
[[File:TBD.png|thumb|300px|center]]
  
 
==Part number composition==
 
==Part number composition==
AURA SOM module part number is composed by several fields as follows.
+
AURA SOM module part number is identified by the following digit-code table:
 
+
{| class="wikitable" style="width:50%"
[Family][SOC][RAM][Storage][Boot Mode][RFU][RFU][Temperature range][PCB revision][Manufacturing option][Software Configuration]
 
 
 
Each field is detailed in the following table.
 
{| class="wikitable" style="width:53%" "
 
 
! style="width:10%" |Part number structure
 
! style="width:10%" |Part number structure
! style="width:50%" |Options
+
! style="width:40%" |Options
 
! style="width:20%" |Description
 
! style="width:20%" |Description
 
|-
 
|-
Line 35: Line 30:
 
!SOC
 
!SOC
 
|
 
|
{|
+
* A: PIMX9352CVUXMAA
|A: PIMX9352CVUXMAA
+
* B: MIMX9352DVVxMAB
|1.7GHz
+
* C: MIMX9352CVVxMAB
|Dual Core
+
* D: MIMX9352XVVxMAB
|Tj: (-40+105)
+
* E: MIMX9351DVVxMAB
|Full Feature
+
* F: MIMX9351CVVxMAB
(Preliminary samples)
+
* G: MIMX9351XVVxMAB
|-
+
* H: MIMX9332DVVxMAB
|B: MIMX9352DVVxMAB
+
* I: MIMX9332CVVxMAB
|1.7GHz
+
* J: MIMX9332XVVxMAB
|Dual Core
+
* K: MIMX9331DVVxMAB
|Tj: (0+95)
+
* L: MIMX9331CVVxMAB
|Full Feature
+
* M: MIMX9331XVVxMAB
|-
+
* N: MIMX9302DVVxDAB
|C: MIMX9352CVVxMAB
+
* O: MIMX9302CVVxDAB
|1.7GHz
+
* P: MIMX9301DVVxDAB
|Dual Core
+
* Q: MIMX9301CVVxDAB
|Tj: (-40+105)
+
*
|Full Feature
 
|-
 
|D: MIMX9352XVVxMAB
 
|1.7GHz
 
|Dual Core
 
|Tj: (-40+125)
 
|Full Feature
 
|-
 
|E: MIMX9351DVVxMAB
 
|1.7GHz
 
|Single Core
 
|Tj: (0+95)
 
|Full Feature
 
|-
 
|F: MIMX9351CVVxMAB
 
|1.7GHz
 
|Single Core
 
|Tj: (-40+105)
 
|Full Feature
 
|-
 
|G: MIMX9351XVVxMAB
 
|1.7GHz
 
|Single Core
 
|Tj: (-40+125)
 
|Full Feature
 
|-
 
|H: MIMX9332DVVxMAB
 
|1.7GHz
 
|Dual Core
 
|Tj: (0+95)
 
|No NPU
 
|-
 
|I: MIMX9332CVVxMAB
 
|1.7GHz
 
|Dual Core
 
|Tj: (-40+105)
 
|No NPU
 
|-
 
|J: MIMX9332XVVxMAB
 
|1.7GHz
 
|Dual Core
 
|Tj: (-40+125)
 
|No NPU
 
|-
 
|K: MIMX9331DVVxMAB
 
|1.7GHz
 
|Single Core
 
|Tj: (0+95)
 
|No NPU
 
|-
 
|L: MIMX9331CVVxMAB
 
|1.7GHz
 
|Single Core
 
|Tj: (-40+105)
 
|No NPU
 
|-
 
|M: MIMX9331XVVxMAB
 
|1.7GHz
 
|Single Core
 
|Tj: (-40+125)
 
|No NPU
 
|-
 
|N: MIMX9302DVVxDAB
 
|900 MHz
 
|Dual Core
 
|Tj: (0+95)
 
|Reduced Features
 
|-
 
|O: MIMX9302CVVxDAB
 
|900 MHz
 
|Dual Core
 
|Tj: (-40+105)
 
|Reduced Features
 
|-
 
|P: MIMX9301DVVxDAB
 
|900 MHz
 
|Single Core
 
|Tj: (0+95)
 
|Reduced Features
 
|-
 
|Q: MIMX9301CVVxDAB
 
|900 MHz
 
|Single Core
 
|Tj: (-40+105)
 
|Reduced Features
 
|}
 
 
*
 
*
|These options depends on NXP P/N description [https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-9-processors/i-mx-93-applications-processor-family-arm-cortex-a55-ml-acceleration-power-efficient-mpu:i.MX93?tab=Buy_Parametric_Tab#/ available here]. Other versions can be available, please contact [https://www.dave.eu/helpdesk technical support]
+
|These options depends on XXX. Other versions can be available, please contact [https://www.dave.eu/helpdesk technical support]
 
|-
 
|-
 
!RAM
 
!RAM
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* 1: on board eMMC
 
* 1: on board eMMC
 
* 2: on board SPI NAND
 
* 2: on board SPI NAND
|The boot modes listed here are "single boot", meaning that the Cortex-A55 is the first core to boot.
+
|
 
 
Other options are available on-demand, however. DAVE Embedded Systems' team is available for additional information on this matter. If necessary, please contact [mailto:sales@dave.eu sales@dave.eu].
 
 
|-
 
|-
 
!RFU
 
!RFU
Line 201: Line 108:
  
 
=== Example ===
 
=== Example ===
AURA SOM code '''DAUB13100I0R-00'''
+
AURA SOM code '''DAUA13100I0R-00'''
  
* B MIMX9352DVVxMAB 1.7GHz Dual Core Tj: (0+95) Full Feature
+
* A -
 
* 1 - 1GB LPDDR4
 
* 1 - 1GB LPDDR4
 
* 3 - 8GB eMMC
 
* 3 - 8GB eMMC

Revision as of 12:40, 30 August 2023

History
ID# Issue Date Notes

17886

15/05/2023 Preliminary information



TBD.png

Part number composition[edit | edit source]

AURA SOM module part number is identified by the following digit-code table:

Part number structure Options Description
Family DAU Family prefix code
SOC
  • A: PIMX9352CVUXMAA
  • B: MIMX9352DVVxMAB
  • C: MIMX9352CVVxMAB
  • D: MIMX9352XVVxMAB
  • E: MIMX9351DVVxMAB
  • F: MIMX9351CVVxMAB
  • G: MIMX9351XVVxMAB
  • H: MIMX9332DVVxMAB
  • I: MIMX9332CVVxMAB
  • J: MIMX9332XVVxMAB
  • K: MIMX9331DVVxMAB
  • L: MIMX9331CVVxMAB
  • M: MIMX9331XVVxMAB
  • N: MIMX9302DVVxDAB
  • O: MIMX9302CVVxDAB
  • P: MIMX9301DVVxDAB
  • Q: MIMX9301CVVxDAB
These options depends on XXX. Other versions can be available, please contact technical support
RAM
  • 1: 1GB LPDDR4
  • 2: 2GB LPDDR4
Storage

eMMC/NAND/QSPI

  • 0: No Storage on board
  • 1: 16MB NOR SPI, 8GB eMMC
  • 2: 256MB NAND, 8GB eMMC
  • 3: 8GB eMMC, no NAND/NOR (SD3 available)
  • 4: 256MB NAND, no eMMC (SD1 available)
  • 5: 4GB eMMC, no NAND/NOR (SD3 available)
  • 6: 16MB NOR SPI, 4GB eMMC
SPI NOR and NAND are alternatives mounting options
Boot Mode:
  • 0: on board SPI NOR
  • 1: on board eMMC
  • 2: on board SPI NAND
RFU
  • 0: RFU
RFU
  • 0: RFU
Temperature range
  • C - Commercial grade: suitable for 0-70°C envirronment
  • I - Industrial grade: suitable for 40 - 85°C envirronment
PCB revision
  • 0: first version
PCB release may change for manufacturing purposes (i.e. text fixture adaptation)
Manufacturing option
  • R: RoHS compliant
typically connected to production process and quality
Software Configuration -00: standard factory u-boot pre-programmed If customers require custom SW deployed this section should be defined and agreed. Please contact technical support

Example[edit | edit source]

AURA SOM code DAUA13100I0R-00

  • A -
  • 1 - 1GB LPDDR4
  • 3 - 8GB eMMC
  • 1 - eMMC boot
  • 0 - RFU
  • 0 - RFU
  • I - Industrial grade: -40 to +85°C
  • 0 - first version
  • R - RoHS compliant
  • -00 -