AXEL Lite SOM/AXEL Lite Hardware/Power and Reset/JTAG

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History
Version Issue Date Notes
1.0.0 Sep 2020 New layout documentation



On board JTAG connector[edit | edit source]

JTAG signals are routed to a dedicated connector on the AXEL Lite PCB.

The connector is placed on the top side of the PCB, at the upper-right corner (please see the picture below).

Axellite-jtag-conn.png

J7 - SOM Connector's pinout[edit | edit source]

J7 footprint mates with Samtec FSI-110-03-G-S connector. The following table reports the connector's pinout:

JTAG connector
Pin# Pin name Function ARM-20 JTAG Notes
1 DGND - 4,6,8,10,12,14,16,18,20 For example documented on Lauterbach specification
2 JTAG_TCK - 9 -
3 JTAG_TMS - 7 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
4 JTAG_TDO - 13 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
5 JTAG_TDI - 5 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
6 JTAG_nTRST - 3 (*) 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
7 CPU_PORn - 15 (*) -
8 N.C. - -
9 N.C. - -
10 JTAG_VREF - 1 3V3 (BOARD_PGOOD driven signal)

(*) keep the possibility to be unconnected