MITO 8M Mini SOM/MITO 8M Mini Evaluation Kit/pdf
Getting started[edit | edit source]
Kit Identification Codes[edit | edit source]
The development kits are identified by a couple of codes:
- P/N Part Number identification code
- S/N Serial Number identification code
These codes are printed on a label sticked to the box containing the kit.
For example, the following picture shows such a label of MITO 8M Mini Evaluation Kit with Serial Number 1233
These codes are required to complete the registration process of the kit.
Unboxing[edit | edit source]
Once you've received the kit, please open the box and check the kit contents with the packing list included in the box, using the table on this chapter as a reference.
The hardware components (SOM, carrier boards and display) are pre-assembled, as shown in the picture below:
Kit Contents[edit | edit source]
The following table list the kit components:
Component | Description |
---|---|
SBCX with MITO 8M Mini SOM | |
LVDS to HDMI adapter | |
8” 1280x720 LCD display
HDMI interface | |
M.2 Wifi module with miniPCIe adapter | |
Dual port USB Hub (for touch connection) | |
AC/DC Single Output Wall Mount adapter Output: +12V – 2.0 A | |
FTDI USB/RS232 cable adapter FTDI code: CHIPI-X10 | |
DB9 Male Serial port adapter | |
MicroSDHC card |
Order codes[edit | edit source]
Order code | Description |
---|---|
SBCDMM0000B0R-00 | This code refers to the default configuration detailed above |
microSD Layout[edit | edit source]
The microSD provided with is used to store:
- a bootable partition (mmcblk1p1, vfat) containing:
- binary images (u-boot and kernel images)
- root file system partition (mmcblk1p2, ext4)
Connections[edit | edit source]
This section describes how to quickly start the Evaluation Kit. The picture below shows the MITO 8M Mini SOM in the Evaluation Kit:
The system is programmed to automatically boot Linux at power up, loading the bootloader, the kernel and device tree image and the root file system from the SD card memory.
To connect to the system:
- insert the pre-programmed SD card into J26 microSD slot
- connect the 12Vcc power supply to J2 on the board
- connect the DB9 adapter bracket to the J22 connector on the SBCX and connect the DB9 connector to the PC COM port through a NULL-modem cable (not provided)
- start your favorite terminal emulator software on PC (eg: PuTTY, Minicom, ...); communication parameters are 115200,N,8,1
- (optional) connect the ethernet cable from your LAN hub/switch to the J51 RJ45 connector
- start SSH, using the following parameters:
- ip address: depends on
eth0
configuration made via serial console orsystemd
services, see How_to_configure_the_network_interfaces - username: root
- password: empty field
- ip address: depends on
- start SSH, using the following parameters:
- (optional) connect the HDMI cable from the provided LCD panel to the J3 LVDS-to-HDMI connector and the USB HUB (with the LCD panel touchscreen connector) to the J17 USB connector
First boot[edit | edit source]
Once power has been applied, U-Boot bootloader will be executed and the debug messages will be printed on the serial console. U-Boot automatically runs the autoboot macro, that loads the kernel/dtb and launches it with the options for mounting the root file system from the SD card.
At the end of the boot process, a demo application is launched and you can interact with the system using the touchscreen. The Linux shell is available on the serial console. Moreover, both telnet and ssh services are available to connect to the system through the network.
Serial console[edit | edit source]
A simple Windows serial and SSH/telnet client and terminal can be downloaded from here.
The following picture shows the serial setup for connecting to the EVK:
once selected the COM[x] serial port, click the Open
button which starts the terminal. Once powered, the EVK shows the U-boot debug messages printed on the serial console.
Connecting through SSH[edit | edit source]
The following picture shows the SSH connection to the EVK:
once selected the IP address, click the Open
button which starts the terminal. Once connected, the EVK shows the linux kernel prompt login for inserting the login:
Then use the root
login username without password:
Boot Configurations[edit | edit source]
MITO 8M Mini Evaluation Board is built upon i.MX8M Mini/Nano family processor.
The following sections detail boot configuration options, which differ depending on the SoM.
For more information about MITO 8M Mini boot options, see the related page on MITO 8M Mini Hardware Manual.
Available options[edit | edit source]
Boot modes can be selected by J32 jumper switches which acts directly on J2.20 BOOT_MODE_SEL SOM pin.
Boot options order code | Jumper mounted | Jumper not mounted |
---|---|---|
Boot from NAND | SD | NAND |
Boot from eMMC | SD | eMMC |
Reset Button[edit | edit source]
MITO 8M Mini/Nano Evaluation Board has a pushbutton directly connected to the PMIC_PWRON signal which drives a SOM hardware reset.
S3 is the hardware reset button.
General Information[edit | edit source]
Product Highlights[edit | edit source]
The MITO 8M Mini/Nano EVK presented here provides a compact solution for any industry and can be easily interfaced with Plant Automation Control thanks to IEC-61131 SW language environment and/or other plug-ins like QT framework, Chromium web based GUI or multimedia GStreamer video applications.
The following table summarizes the main hardware and software features available with MITO 8M Mini Evaluation Kit:
Hardware[edit | edit source]
Subsystem | Characteristics |
---|---|
CPU | NXP i.MX8M Mini/Nano |
USB | Host and device |
Serial Ports | RS232/422/485 mutliprotocol LVTTL UART |
Ethernet | 10/100/1000Mbps |
Display | Dual LVDS interface |
Video | 1x MIPI CSI 4-lanes (optional) interface |
Touchscreen | Capacitive USB (or I2C - optional) |
Audio | Stereo OUT and MIC in (on 2x2.54mm connector) |
Connectivity | Bluetooth and Wi-Fi PCIe (optional) interface - for i.MX8M Mini only WIDE™ interface with 40 GPIOs |
PSU | 12 to 24V DC |
Mechanical Dimensions | 84x156mm - Standard DIN (9modules) |
Software[edit | edit source]
Subsystem | Options |
---|---|
Operating System | Linux, Android |
Distribution | Yocto, Debian, Buildroot |
Graphical Framework | Qt, Android, Chromium browser |
Applications | IoT runtime, nodeJS |
Block diagram[edit | edit source]
The following picture shows a simplified block diagram of the MITO 8M Mini/Nano SOM Evaluation kit.
Main functional subsystems and interfaces are depicted.
The heart of the Evaluation Kit is the MITO 8M Mini/Nano SOM module: please refer to the following Product Highlights page for the Evaluation Kit product highlights information.
Here below a summary for the main characteristics of the Kit.
Features Summary[edit | edit source]
Feature | Specifications |
---|---|
Supported SOM | NXP i.MX8M Mini/Nano SOM |
Serial Ports | 1x UART RS232/RS422/RS485 1x LVTTL UART 1x UART RS232 on pin strip (debug port) |
Connectivity | 1x Gigabit Ethernet on RJ45 connector DWS Wireless module (optional) |
Display | 2x LVDS |
Camera | 1x MIPI Video input (optional) |
Storage | 1x microSD slot |
USB | 1x USB 2.0 Host port 1x USB OTG port |
Audio | TLV320AIC310 codec |
Miscellaneous | Capacitive touch controller (optional) PCIe adapter (optional for i.MX8M Mini only) 40 GPIOs (on WIDE connector) JTAG RTC battery Additional ECSPI, UART, I2C, SDIO on WIDE™ connector |
Electrical, Mechanical and Environmental Specifications[edit | edit source]
Electrical / Mechanicals | Specifications |
---|---|
Supply voltage | + [12 - 24] V |
Dimensions | 156 mm x 84 mm |
Weight | 107,6 g |
Operating Temperature | 0..70 °C |
Interfaces and Connectors[edit | edit source]
Power Supply[edit | edit source]
Description[edit | edit source]
Power is provided through the J2 connector. Power voltage range is +[12-24 V].
J2 is a two pins MSTBA 2.5/2-G-5.08 Phoenix connector.
Signals[edit | edit source]
The following table describes the interface signals:
Pin# | Pin function | Pin Notes |
---|---|---|
1 | DGND | Ground |
2 | VIN | +[12-24 V] |
Power LED[edit | edit source]
DL1 is a green LED (placed near battery holder) shows the status of the power input. This LED is ON when a valid power supply is present.
CPU connector[edit | edit source]
Description[edit | edit source]
J10 is the 204-pins SODIMM mating connector for the MITO 8M Mini/Nano SOM.
For a detailed description of the SOM pinout, please refer to the MITO 8M Mini SOM Hardware Manual.
On board JTAG connector[edit | edit source]
JTAG signals are routed to a dedicated connector on the MITO 8M Mini/Nano PCB.
The connector is placed on the top side of the PCB, at the upper-right corner (please see the picture below).
J7 - SOM Connector's pinout[edit | edit source]
J7 footprint mates with Samtec FSI-110-03-G-S connector. The following table reports the connector's pinout:
Pin# | Pin name | Function | ARM-20 JTAG | Notes |
---|---|---|---|---|
1 | DGND | - | 4,6,8,10,12,14,16,18,20 | For example documented on Lauterbach specification |
2 | JTAG_TCK | - | 9 | - |
3 | JTAG_TMS | - | 7 | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
4 | JTAG_TDO | - | 13 | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
5 | JTAG_TDI | - | 5 | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
6 | JTAG_nTRST | - | 3 (*) | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
7 | CPU_PORn | - | 15 (*) | - |
8 | N.C. | - | - | |
9 | N.C. | - | - | |
10 | JTAG_VREF | - | 1 | 3V3 (BOARD_PGOOD driven signal) |
(*) keep the possibility to be unconnected
JD1 - EVB Connector's pinout[edit | edit source]
JD1 is a 10x1x2.54mm pinhole header. The following table reports the connector's pinout:
Pin# | Pin name | Function | Notes |
---|---|---|---|
1 | DGND | - | |
2 | JTAG_TCK | - | - |
3 | JTAG_TMS | - | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
4 | JTAG_TDO | - | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
5 | JTAG_TDI | - | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
6 | JTAG_nTRST | - | 10K pull-up to 3V3 (BOARD_PGOOD driven signal) |
7 | JTAG_nRST | - | - |
8 | N.C. | - | - |
9 | N.C. | - | - |
10 | JTAG_VREF | - |
Ethernet[edit | edit source]
Description[edit | edit source]
J16 is a standard RJ45 connectors connected to the SOM integrated ethernet controller and PHY.
Signals[edit | edit source]
The following table describes the interface signals:
Pin# | SOM Pin# | Pin name | Pin function | Pin Notes |
---|---|---|---|---|
11 | J10.19 | ETH0_TXRX0_P | Transmit and receive pair 0 data + | |
10 | J10.21 | ETH0_TXRX0_M | Transmit and receive pair 0 data - | |
4 | J10.23 | ETH0_TXRX1_P | Transmit and receive pair 1 data + | |
3 | J10.27 | ETH0_TXRX2_P | Transmit and receive pair 2 data + | |
2 | J10.29 | ETH0_TXRX2_M | Transmit and receive pair 2 data - | |
5 | J10.25 | ETH0_TXRX1_M | Transmit and receive pair 1 data - | |
8 | J10.31 | ETH0_TXRX3_P | Transmit and receive pair 3 data + | |
9 | J10.33 | ETH0_TXRX3_M | Transmit and receive pair 3 data - | |
17 | J10.15 | 3V3_ETH1_LED2 | Eth link led | |
20 | J10.13 | 3V3_ETH1_LED1 | Eth activity led |
Device mapping[edit | edit source]
The network interface mapped at eth0
device in Linux.
Device usage[edit | edit source]
The peripheral is used the standard kernel interface and network protocol stack.
Console interface[edit | edit source]
Description[edit | edit source]
The Console interface available on the Evaluation Kit at the connector J22.
J22 is a 10 pin (5x2x2.54mm) header connector for the RS232 two-wires UART2 port, used for debug purposes (bootloader and operating system serial console).
Signals[edit | edit source]
The following table describes the interface signals:
Pin# | SOM Pin# | Pin name | Pin function | Pin Notes |
---|---|---|---|---|
1,2,4,6,,7,8,10 | - | N.A. | N.C. | Not connected |
3 | J10.189 | RS232_RX | Receive line | |
3 | J10.187 | RS232_TX | Transmit line | |
9 | - | DGND | Ground |
Device mapping[edit | edit source]
UART2 is mapped to /dev/ttymxc1
device in Linux. The peripheral is used as the default serial console, both for the bootloader and the kernel.
Device usage[edit | edit source]
To connect to the debug serial port:
- connect the DB9 adapter bracket to the J22 connector on the SBCX board
- connect a serial cable between DB9 connector and PC COM port through a NULL-modem cable (not provided)
- start your favorite terminal emulator software on PC (eg: PuTTY); communication parameters are: 115200,N,8,1
UARTs interface[edit | edit source]
Description[edit | edit source]
The UARTs interface available on the Evaluation Kit are mapped to the following connectors:
- J21 is a standard DB9 male connector for the configurable UART1 port. The board provides some configuration options for the selection of the UART mode (RS232/RS422/RS485 with auto-direction)
- J25 is a 6x1x2.54mm horizontal socket header for the UART3 port. This is a Digilent Pmod™ Compatible connector for the UART Pmod™ Compatiblemodule (6-Pin Pmod™ Compatible Connector Digilent Pmod™ Interface Specification Type 4 UART)
Signals[edit | edit source]
The following tables describes the interface signals
UART1[edit | edit source]
In the schematics page 13, the signals label are referring to the original AXEL Lite EVK SOM's signals. UART5 is referencing the AXEL Lite UART connection and should be used just as a signal labels. |
Pin# | SOM Pin# | Pin name | RS-232 | RS-422 | RS-485 |
---|---|---|---|---|---|
1 | - | Not connected | Not connected | Not connected | Not connected |
2 | J10.95 | UART5_A | UART5 receive line | UART5_A | UART5_A |
3 | J10.93 | UART5_Y | UART5 transmit line | UART5_Y | UART5_A |
4 | - | Not connected | Not connected | Not connected | Not connected |
5 | - | DGND | Ground | Ground | Ground |
6 | - | Not connected | Not connected | Not connected | Not connected |
7 | J10.105 | UART5_Z | UART5 Request To Send | UART5_Z | UART5_B |
8 | J10.107 | UART5_B | UART5 Clear To Send | UART5_B | UART5_B |
9 | - | Not connected | Not connected | Not connected | Not connected |
The J19 and J20 jumpers are used to configure the UART mode, as reported below:
Jumper | RS232 mode | RS422 mode | RS485 mode |
---|---|---|---|
1-3 | open | open | closed |
5-7 | open | closed | open |
9-11 | open | closed | open |
2-4 | open | open | closed |
6-8 | open | closed | closed |
10-12 | open | closed | closed |
13-15 | open | open | closed |
14-16 | open | open | closed |
UART3[edit | edit source]
Pin# | SOM Pin# | Pin name | Pin function | Pin Notes |
---|---|---|---|---|
1 | J10.50 | PMOD_A0 | Clear to send | |
2 | J10.89 | PMOD_A1 | Transmit data | |
3 | J10.91 | PMOD_A2 | Receive data | |
4 | J10.40 | PMOD_A3 | Request to send | |
5 | - | DGND | Ground | |
6 | - | 3V3 | +3.3 V |
Device mapping[edit | edit source]
- UART1 is mapped to
/dev/ttymxc1
device in Linux - UART3 is mapped to
/dev/ttymxc2
device in Linux
Device usage[edit | edit source]
- UART1 is a MultiProtocol that supports (after hardware Jumper configuration) the RS232, RS4222 or RS485 protocols. The related device tree file has to be properly configured too for enabling the GPIO transceiver configuration.
- UART3 can be used with a PMOD adapter or with a TTL peripheral
micro SD interface[edit | edit source]
Description[edit | edit source]
The micro SD interface available on the Evaluation Kit at the connector J26.
J26 is a Micro-SD card header. This interface is connected to the USDHC2 controller of the i.MX8M Mini/Nano CPU.
Signals[edit | edit source]
The following table describes the interface signals:
Pin# | SOM Pin# | Pin name | Pin function | Pin Notes |
---|---|---|---|---|
1 | J10.79 | SD_DAT2 | Data 2 | |
2 | J10.81 | SD_DAT3 | Data 3 | |
3 | J10.83 | SD_CMD | CMD | |
4 | - | 3V3 | +3.3 V | |
5 | J10.85 | SD_CLK | Clock | |
6, 12 | - | DGND | Ground | |
7 | J10.75 | SD_DAT0 | Data 0 | |
8 | J10.77 | SD_DAT1 | Data 1 | |
9, 10, 11 | - | SD_SHIELD | Shield | |
13 | J10.177 | EIM_D19 | Card detect | SD2_CD_B on i.MX8M Mini/Nano |
Device mapping[edit | edit source]
The microSD card is mapped to /dev/mmcblk1
. The available partitions are shown as /dev/mmcblk1p1
, /dev/mmcblk1p2
, etc.
Device usage[edit | edit source]
The device can be mounted/accessed as a standard block device in Linux.
USB ports[edit | edit source]
Description[edit | edit source]
MITO 8M Mini Evaluation Kit provides two USB ports, one Host and one OTG:
- J17 is a standard USB Host 2.0 Type A connector
- J18 is a micro-AB type receptacle for a USB OTG connection: this interface can operate in Host mode and Device (peripheral) mode
Signals[edit | edit source]
The following table describes the interface signals
USB Host[edit | edit source]
Pin# | SOM Pin# | Pin name | Pin function | Pin Notes |
---|---|---|---|---|
1 | J10.188 | USB_HOST_VBUS | VBUS | USB2 VBUS |
2 | J10.202 | USB_HOST_DN | USB Host Data - | USB2 DM |
3 | J10.200 | USB_HOST_DP | USB Host Data + | USB2 DP |
4 | - | DGND | Ground |
USB OTG[edit | edit source]
Pin# | SOM Pin# | Pin name | Pin function | Pin Notes |
---|---|---|---|---|
6, 7, 8, 9 | - | USB_OTG_SH Shield | ||
1 | J10.186 | USB_OTG_VBUS | VBUS | USB1 VBUS |
2 | J10.196 | USB_OTG_DN | USB OTG Data - | USB1 DM |
3 | J10.198 | USB_OTG_DP | USB OTG Data + | USB1 DP |
4 | J10.192 | ENET_RX_ER | USB OTG ID | USB1 ID |
5 | - | GND | Ground |
Device usage[edit | edit source]
The USB Host port can be used under Linux for connecting USB peripheral devices: the related peripheral driver has to be integrated into the Linux kernel.
The USB OTG feature can be easily tested using the Mass Storage Gadget driver.
LVDS[edit | edit source]
Description[edit | edit source]
SBCX provides two LVDS interfaces, LVDS0 and LVDS1.
- J8 is a Hirose (cod. DF13A-20DP-1.25V) double row 1.25mm pitch miniature crimping connector
- J9 is a Hirose (cod. DF13A-20DP-1.25V) double row 1.25mm pitch miniature crimping connector
Signals[edit | edit source]
The following tables describes the interface signals
LVDS0[edit | edit source]
Pin# | SOM Pin# | Pin name | Pin function | Pin Notes |
---|---|---|---|---|
1, 2 | - | 3.3V_LCD0 | 3.3 V | |
3, 4, 7, 10,
13, 16, 19 |
- | DGND | Ground | |
5 | J10.137 | LVDS0_TX0_N | LVDS Data 0 - | |
6 | J10.139 | LVDS0_TX0_P | LVDS Data 0 + | |
8 | J10.141 | LVDS0_TX1_N | LVDS Data 1 - | |
9 | J10.143 | LVDS0_TX1_P | LVDS Data 1 + | |
11 | J10.145 | LVDS0_TX2_N | LVDS Data 2 - | |
12 | J10.147 | LVDS0_TX2_P | LVDS Data 2 + | |
14 | J10.133 | LVDS0_CLK_N | LVDS Clock - | |
15 | J10.135 | LVDS0_CLK_P | LVDS Clock + | |
17 | J10.149 | LVDS0_P17 | LVDS0_TX3_N | |
18 | J10.151 | LVDS0_P18 | LVDS0_TX3_P | |
20 | J10.46 | LVDS0_P20 | PWM4 |
LVDS1[edit | edit source]
Pin# | SOM Pin# | Pin name | Pin function | Pin Notes |
---|---|---|---|---|
1, 2 | - | 3.3V_LCD0 | 3.3 V | |
3, 4, 7, 10,
13, 16, 19 |
- | DGND | Ground | |
5 | J10.159 | LVDS1_TX0_N | LVDS Data 0 - | |
6 | J10.161 | LVDS1_TX0_P | LVDS Data 0 + | |
8 | J10.163 | LVDS1_TX1_N | LVDS Data 1 - | |
9 | J10.165 | LVDS1_TX1_P | LVDS Data 1 + | |
11 | J10.167 | LVDS1_TX2_N | LVDS Data 2 - | |
12 | J10.169 | LVDS1_TX2_P | LVDS Data 2 + | |
14 | J10.155 | LVDS1_CLK_N | LVDS Clock - | |
15 | J10.157 | LVDS1_CLK_P | LVDS Clock + | |
17 | J10.171 | LVDS1_P17 | LVDS1_TX3_N | |
18 | J10.173 | LVDS1_P18 | LVDS1_TX3_P | |
20 | J10.46 | LVDS1_P20 | GND | PWM (J10.46) as mount option |
Device mapping[edit | edit source]
- LVDS0 is mapped to
/dev/fb0
device in Linux - LVDS1 is mapped to the corresponding device driver in Linux, depending on the
ldb
peripheral configuration in the device tree. The default value is disabled but can be mapped to/dev/fb2
(second and independent LCD panel) or can be the second LVDs channel for a dual-channel LCD panel configuration (like a 1920x1080 DUAL LVDS channel LCD panel)
Power sequence[edit | edit source]
Most of the LCD panels have many supplies and need a specific timing to power the rails and start the signals.
The Evaluation Kit provides GPIO controlled power rails that can be leveraged both at bootloader and kernel level to meet any specifications.
The following sections describe the available rails:
3V3_LCD[edit | edit source]
The most common voltage to supply the LCD panel internal logic:
- rail 3V3_LCD0 is enabled by
GPIO4_IO29
- rail 3V3_LCD1 is enabled by
GPIO4_IO30
5V_LCD[edit | edit source]
The most common voltage to supply the LCD panel backlight:
- rail 5V_LCD0 is enabled by
GPIO5_IO5
- rail 5V_LCD1 is enabled by
GPIO1_IO01
Device usage[edit | edit source]
The associated framebuffer device is accessed in Linux through the standard graphic access.
MIPI[edit | edit source]
Description[edit | edit source]
J34 is a 20x2x1.00 mm One Piece Interface dedicated to the (optional) MIPI camera input and the PCI Express expansion bus interface.
This connector can be used as a Camera Interface for connecting an optional MIPI CSI-2 camera device.
Signals[edit | edit source]
The following table describes the interface signals:
Pin# | SOM Pin# | Pin name | Pin function | Pin Notes |
---|---|---|---|---|
1 | - | 5V_IN | ||
3 | J10.97 | AUX_PWR_EN | connected to SD2_WP (GPIO2_IO20) | |
13 | - | AUX_USB_DN | ||
15 | - | AUX_USB_DP | ||
19 | J10.53 | CAM_PWD | connected to GPIO1_IO09 | |
20 | - | 3V3 | ||
21 | J10.51 | CAM_RSTn | connected to GPIO1_IO08 | |
22 | J10.60 | CAM_CLK | ||
25 | J10.102 | CSI_CLK0M_1 | ||
26 | J10.48 | CSI_SDA | I2C3_SDA | |
27 | J10.104 | CSI_CLK0P_1 | ||
28 | J10.38 | CSI_SCL | I2C3_SCL | |
31 | J10.110 | CSI_D1M_1 | ||
32 | J10.106 | CSI_D0M_1 | ||
33 | J10.112 | CSI_D1P_1 | ||
34 | J10.108 | CSI_D0P_1 | ||
37 | J10.118 | CSI_D3M_1 | ||
38 | J10.114 | CSI_D2M_1 | ||
39 | J10.120 | CSI_D3P_1 | ||
40 | J10.116 | CSI_D2P_1 | ||
5, 8, 11, 14, 17, 23, 24, 29, 30, 35, 36 |
- | DGND | Ground |
Device mapping[edit | edit source]
The MIPI CSI peripheral is mapped to the corresponding /dev/video<X>
device in Linux. The device mapping depends on the device tree configuration.
PCIe[edit | edit source]
Description[edit | edit source]
J34 is a 20x2x1.00 mm One Piece Interface dedicated to the MIPI camera input and the PCI Express expansion bus interface.
Signals[edit | edit source]
The following table describes the interface signals:
Pin# | SOM Pin# | Pin name | Pin function | Pin Notes |
---|---|---|---|---|
1 | - | 5V_IN | ||
2 | J10.64 | PCIE_WAKE_B | ||
3 | J10.97 | AUX_PWR_EN | connected to SD2_WP (GPIO2_IO20) | |
4 | J10.76 | PCIE_RST_B | connected to I2C4_SCL (GPIO5_IO20) | |
6 | J10.74 | PCIE_DIS_B | connected to I2C4_SDA (GPIO5_IO21) | |
7 | J10.84 | PCIE_CLKN | ||
9 | J10.86 | PCIE_CLKP | ||
10 | J10.92 | PCIE_RXN_R | ||
12 | J10.94 | PCIE_RXP_R | ||
16 | J10.96 | PCIE_TXN_C | ||
18 | J10.98 | PCIE_TXP_C | ||
20 | - | 3V3 | ||
25 | J10.102 | CSI_CLK0M_1 | ||
26 | J10.48 | CSI_SDA | I2C3_SDA | |
28 | J10.38 | CSI_SCL | I2C3_SCL | |
5, 8, 11, 14, 17, 23, 24, 29, 30, 35, 36 |
- | DGND | Ground |
Device mapping[edit | edit source]
The PCI express peripheral is mapped to the corresponding device in Linux depending on the associated kernel device driver and on the device tree configuration.
Audio[edit | edit source]
Description[edit | edit source]
The Audio interface available on the Evaluation Kit at the connector J27.
J27 is a 7x2x2.54mm header. The audio codec is a TLV320AIC3100 device connected to the I²S interface.
Signals[edit | edit source]
The following table describes the interface signals:
Pin# | Pin name | Pin function | Pin Notes |
---|---|---|---|
4, 5, 8, 9 | AGNDM Analog | Ground | |
1 | AUX_RES | Analog ground | |
2 | AUXR | Microphone in right | |
3 | AUXL | Microphone in left | |
6 | SPKM | Speaker out (negative) | |
7 | SPKP | Speaker out (positive) | |
10 | HSOR | Audio Headset right | |
11 | HSOL | Audio Headset left | |
12 | MIC_BIAS | Microphone bias | |
13 | AUD_HP_VGND | Analog ground |
Device mapping[edit | edit source]
The Audio interface is mapped to card0
ALSA device in Linux. The ALSA peripheral #0: SBCX_TLV320
can be accessed via alsa-utils with hardware address 0.
Device usage[edit | edit source]
For example, it is possible to play a file using aplay
RTC[edit | edit source]
Description[edit | edit source]
MITO 8M Mini/Nano Evaluation Kit uses the RTC device provided by MITO 8M Mini PMIC
An external lithium battery (like Panasonic ML-2020/G1AN rechargeable battery) can be optionally mounted on SBCX.
Signals[edit | edit source]
The following table describes the interface signals:
Pin# | SOM Pin# | Pin name | Pin function | Pin Notes |
---|---|---|---|---|
- | J10.14 | PMIC_LICELL | coin cell battery network has to be properly configured for lithium battery recharge current |
Device mapping[edit | edit source]
RTC is mapped to /dev/rtc0
device in Linux.
Device usage[edit | edit source]
The peripheral can be accessed through the date
and hwclock
linux commands.
GPIOs[edit | edit source]
Description[edit | edit source]
i.MX8M Mini can handle external pins in many different ways and most of them can be configured as GPIOs. When a pin is set as a GPIO, it is possible to read its value, change its direction or change output value directly from the shell.
Many GPIOs are available on J33 WIDE™ (Wise Interface Display Expander) connector.
Signals[edit | edit source]
The following table describes some GPIOs signals available on J33 WIDE™ connector:
Pin# | SOM Pin# | Pin name | GPIO index | Alternate function |
---|---|---|---|---|
1 | J10.134 | LCD_B0 | GPIO2_IO11 | SD1_STROBE |
2 | J10.179 | EIM_D20 | GPIO5_IO9 | ECSPI1_SS0 |
3 | J10.136 | LCD_B1 | GPIO3_IO5 | |
4 | J10.181 | EIM_D21 | GPIO5_IO6 | ECSPI1_SCLK |
5 | J10.138 | LCD_B2 | GPIO2_IO2 | SD1_DATA0 |
6 | J10.183 | EIM_D22 | GPIO5_IO8 | ECSPI1_MISO |
7 | J10.140 | LCD_B3 | GPIO2_IO3 | SD1_DATA1 |
8 | J10.195 | EIM_D28 | GPIO5_IO7 | ECSPI1_MOSI |
9 | J10.142 | LCD_B4 | GPIO2_IO4 | SD1_DATA2 |
11 | J10.144 | LCD_B5 | GPIO2_IO5 | SD1_DATA3 |
13 | J10.148 | LCD_B6 | GPIO2_IO6 | SD1_DATA4 |
15 | J10.150 | LCD_B7 | GPIO2_IO7 | SD1_DATA5 |
17 | J10.152 | LCD_G0 | GPIO2_IO8 | SD1_DATA6 |
18 | J10.38 | GPIO_5 | GPIO5_IO18 | I2C3_SCL |
19 | J10.154 | LCD_G1 | GPIO2_IO9 | SD1_DATA7 |
20 | J10.48 | GPIO_16 | GPIO5_IO19 | I2C3_SDA |
21 | J10.156 | LCD_G2 | GPIO3_IO15 | |
23 | J10.158 | LCD_G3 | GPIO3_IO16 | |
24 | J10.46 | GPIO_9 | GPIO5_IO2 | PWM4 |
25 | J10.160 | LCD_G4 | GPIO3_IO17 | |
26 | J10.28 | GPIO_1 | GPIO1_IO02 | |
27 | J10.162 | LCD_G5 | GPIO3_IO18 | |
28 | J10.191 | EIM_D26 | GPIO5_IO29 | UART4_TXD |
29 | J10.166 | LCD_G6 | GPIO1_IO15 | |
30 | J10.193 | EIM_D27 | GPIO5_IO28 | UART4_RXD |
31 | J10.168 | LCD_G7 | GPIO1_IO07 | |
32 | J10.50 | GPIO_17 | GPIO5_IO0 | |
33 | J10.170 | LCD_R0 | GPIO4_IO16 | |
34 | J10.40 | GPIO_6/I2C3_SDA | GPIO4_IO31 | |
35 | J10.172 | LCD_R1 | GPIO4_IO17 | |
37 | J10.174 | LCD_R2 | GPIO4_IO18 | |
39 | J10.176 | LCD_R3 | GPIO4_IO19 | |
41 | J10.178 | LCD_R4 | GPIO4_IO9 | |
43 | J10.180 | LCD_R5 | GPIO4_IO8 | |
45 | J10.182 | LCD_R6 | GPIO4_IO7 | |
47 | J10.184 | LCD_R7 | GPIO4_IO6 | |
49 | J10.124 | LCD_DV | GPIO3_IO14 | |
51 | J10.126 | LCD_AUX_PIN | GPIO3_IO0 | |
53 | J10.128 | LCD_VSYNC | GPIO2_IO0 | SD1_CLK |
55 | J10.130 | LCD_HSYNC | GPIO2_IO10 | SD1_CMD |
57 | J10.132 | LCD_PIXEL_CLK | GPIO2_IO11 | SD1_RESET |
Device mapping[edit | edit source]
GPIOs can be used directly on Linux kernel device driver or can be configured on the device tree.
Device usage[edit | edit source]
See the GPIOs page on the DESK-MX8M-L Software Manual.
Electrical and Mechanical Documents[edit | edit source]
Schematics[edit | edit source]
Please find here below the links for the MITO 8M Mini/Nano Evaluation Kit schematics and the related documents (BOM and layout):
BOM[edit | edit source]
Layout[edit | edit source]
Mechanical specifications[edit | edit source]
This page describes the mechanical characteristics of the MITO 8M Mini/Nano EVK carrier board.
Board layout[edit | edit source]
Dimensions[edit | edit source]
3D drawings[edit | edit source]
Mechanical data[edit | edit source]
Dimension | Value |
---|---|
Width | 156 mm |
Depth | 84 mm |
Max component's height (top) | 13.87 mm |
Max component's height (bottom) | |
PCB height | 1.69 mm |