BORA Lite SOM/BORA Lite Hardware/Peripherals/Programmable logic (FPGA)
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Contents
Programmable logic[edit | edit source]
Introduction[edit | edit source]
The following paragraphs describe in detail the available PL I/O pins and how they are routed to the BORA Lite connector. The Zynq-7000 AP SoC is split into I/O banks to allow for flexibility in the choice of I/O standards, thus each table reports one bank configuration. Moreover, Bora Lite design allows carrier board to power two PL banks in order to achieve complete flexibility in terms of I/O voltage levels too. For more details about PCB design considerations, please refer to the Advanced routing and carrier board design guidelines article.
The following table reports the I/O banks characteristics:
| FPGA Bank | Type | I/O Voltage | Voltage Pins | Notes |
|---|---|---|---|---|
| Bank 13 | High range (HR) | User defined VIO=FPGA_VDDIO_BANK13 1.8 to 3.3V |
J1.41 J1.67 J3.97 J3.98 J3.99 |
Bank 13 is available only with Zynq XC7Z020 part number. Although this bank is not available on Bora SOMs equipped with the XC7Z010 SOC, VDDIO_BANK13 pins must not be left open and must be connected anyway, either to ground or to an external I/O voltage. |
| Bank 34 | High range (HR) | User defined VIO=FPGA_VDDIO_BANK34 1.8 to 3.3V |
J1.77 J1.124 J1.127 J1.129 |
|
| Bank 35 | High range (HR) | User defined VIO=FPGA_VDDIO_BANK35 1.8 to 3.3V |
J1.186 J1.188 J1.192 J1.201 |
Each user I/O is labeled IO_LXXY_Tn_ZZZ_ADi_#, where:
- IO indicates a user I/O pin.
- L indicates a differential pair, with XX a unique pair in the bank and Y = [P|N] for the positive/negative sides of the differential pair.
- Tn indicates the memory byte group [0-3]
- ZZZ indicates a MRCC, SRCC or DQS pin
- ADi indicates a XADC (analog-to-digital converter) differential auxiliary analog input [0–15].
- # indicates the bank number.
Highlighted rows are related to signals that are used for particular functions into the SOM.
FPGA Bank 13 (Zynq 7020 only)[edit | edit source]
N.B. Although BANK 13 is not available on Bora SOMs equipped with the XC7Z010 SOC, VDDIO_BANK13 pins must not be left open and must be connected anyway, either to ground or to an external I/O voltage as described in I/O banks table.
The following table reports the available pins connected to bank 13:
| Pin Name | Conn. Pin | Notes |
| IO_L11P_T1_SRCC_13 | J1.49 | |
| IO_L11N_T1_SRCC_13 | J1.51 | |
| IO_L12P_T1_MRCC_13 | J1.62 | |
| IO_L12N_T1_MRCC_13 | J1.64 | |
| IO_L13N_T2_MRCC_13 | J1.53 | |
| IO_L13P_T2_MRCC_13 | J1.55 | |
| IO_L14N_T2_SRCC_13 | J1.69 | |
| IO_L14P_T2_SRCC_13 | J1.71 | |
| IO_L15N_T2_DQS_13 | J1.59 | |
| IO_L15P_T2_DQS_13 | J1.61 | |
| IO_L16P_T2_13 | J1.63 | |
| IO_L16N_T2_13 | J1.65 | |
| IO_L17N_T2_13 | J1.58 | |
| IO_L17P_T2_13 | J1.60 | |
| IO_L18P_T2_13 | J1.70 | |
| IO_L18N_T2_13 | J1.72 | |
| IO_L19P_T3_13 | J1.66 | |
| IO_L19N_T3_VREF_13 | J1.68 | |
| IO_L20P_T3_13 | J1.78 | |
| IO_L20N_T3_13 | J1.80 | |
| IO_L21N_T3_DQS_13 | J1.74 | |
| IO_L21P_T3_DQS_13 | J1.76 | |
| IO_L22P_T3_13 | J1.45 | |
| IO_L22N_T3_13 | J1.47 | |
| IO_L6N_T0_VREF_13 | J1.43 |
Routing information[edit | edit source]
Routing implemented on Bora SoM allows the use of bank 13's signals as differential pairs as well as single-ended lines. Signals are grouped as denoted by the following table that details routing rules on Bora module. No carrier board guidelines can be provided, because these are application-dependent.
Pairs are highlighted with different colors. When used as differential pairs, differential impedence is 100 Ohm. When used as single-ended signals, impedence is 50 Ohm.
| Bora pin name | Individual net length [mils] |
Intra-pair match [mils] |
Inter-pair match [mils] |
Group Name |
| IO_L11N_T1_SRCC_13 | 963.29 | 5 | 360 | BANK13 Diff group 1 |
| IO_L11P_T1_SRCC_13 | 965.44 | 5 | 360 | BANK13 Diff group 1 |
| IO_L12N_T1_MRCC_13 | 1002.27 | 5 | 360 | BANK13 Diff group 1 |
| IO_L12P_T1_MRCC_13 | 998.73 | 5 | 360 | BANK13 Diff group 1 |
| IO_L13N_T2_MRCC_13 | 819.57 | 5 | 360 | BANK13 Diff group 1 |
| IO_L13P_T2_MRCC_13 | 819.57 | 5 | 360 | BANK13 Diff group 1 |
| IO_L14N_T2_SRCC_13 | 820.26 | 5 | 360 | BANK13 Diff group 1 |
| IO_L14P_T2_SRCC_13 | 821.43 | 5 | 360 | BANK13 Diff group 1 |
| IO_L15N_T2_DQS_13 | 885.06 | 5 | 360 | BANK13 Diff group 1 |
| IO_L15P_T2_DQS_13 | 885.06 | 5 | 360 | BANK13 Diff group 1 |
| IO_L16N_T2_13 | 922.83 | 5 | 360 | BANK13 Diff group 1 |
| IO_L16P_T2_13 | 922.83 | 5 | 360 | BANK13 Diff group 1 |
| IO_L17N_T2_13 | 1007.3 | 5 | 360 | BANK13 Diff group 1 |
| IO_L17P_T2_13 | 1008.75 | 5 | 360 | BANK13 Diff group 1 |
| IO_L18N_T2_13 | 827.46 | 5 | 360 | BANK13 Diff group 1 |
| IO_L18P_T2_13 | 829.35 | 5 | 360 | BANK13 Diff group 1 |
| IO_L19N_T3_VREF_13 | 802.16 | 5 | 360 | BANK13 Diff group 1 |
| IO_L19P_T3_13 | 802.16 | 5 | 360 | BANK13 Diff group 1 |
| IO_L20N_T3_13 | 653.65 | 5 | 360 | BANK13 Diff group 1 |
| IO_L20P_T3_13 | 655.59 | 5 | 360 | BANK13 Diff group 1 |
| IO_L21N_T3_DQS_13 | 738.09 | 5 | 360 | BANK13 Diff group 1 |
| IO_L21P_T3_DQS_13 | 735.9 | 5 | 360 | BANK13 Diff group 1 |
| IO_L22N_T3_13 | 969.5 | 5 | 360 | BANK13 Diff group 1 |
| IO_L22P_T3_13 | 970.21 | 5 | 360 | BANK13 Diff group 1 |
FPGA Bank 34[edit | edit source]
The following table reports the available pins connected to bank 34:
| Pin Name | Conn. Pin | Notes |
| IO_0_34 | J1.79 | |
| IO_25_34 | J1.81 | |
| IO_L1P_T0_34 | J1.84 | |
| IO_L1N_T0_34 | J1.86 | |
| IO_L2P_T0_34 | J1.93 | |
| IO_L2N_T0_34 | J1.95 | |
| IO_L3N_T0_DQS_34 | J1.88 | |
| IO_L3P_T0_DQS_PUDC_B_34 | J1.90 | Internally connected to a 10K pull-up to VDDIO_BANK34 |
| IO_L4P_T0_34 | J1.97 | |
| IO_L4N_T0_34 | J1.99 | |
| IO_L5N_T0_34 | J1.92 | |
| IO_L5P_T0_34 | J1.94 | |
| IO_L6P_T0_34 | J1.110 | |
| IO_L6N_T0_VREF_34 | J1.112 | |
| IO_L7P_T1_34 | J1.89 | |
| IO_L7N_T1_34 | J1.91 | |
| IO_L8N_T1_34 | J1.83 | |
| IO_L8P_T1_34 | J1.85 | |
| IO_L9P_T1_DQS_34 | J1.106 | |
| IO_L9N_T1_DQS_34 | J1.108 | |
| IO_L10P_T1_34 | J1.96 | |
| IO_L10N_T1_34 | J1.98 | |
| IO_L11P_T1_SRCC_34 | J1.105 | |
| IO_L11N_T1_SRCC_34 | J1.107 | |
| IO_L12P_T1_MRCC_34 | J1.130 | Optionally internally connected to RTC/INT_SQW |
| IO_L12N_T1_MRCC_34 | J1.132 | |
| IO_L13N_T2_MRCC_34 | J1.138 | |
| IO_L13P_T2_MRCC_34 | J1.140 | Optionally internally connected to RTC_32KHZ |
| IO_L14P_T2_SRCC_34 | J1.142 | |
| IO_L14N_T2_SRCC_34 | J1.144 | |
| IO_L15P_T2_DQS_34 | J1.118 | |
| IO_L15N_T2_DQS_34 | J1.120 | |
| IO_L16N_T2_34 | J1.115 | |
| IO_L16P_T2_34 | J1.117 | |
| IO_L17P_T2_34 | J1.111 | |
| IO_L17N_T2_34 | J1.113 | |
| IO_L18P_T2_34 | J1.101 | |
| IO_L18N_T2_34 | J1.103 | |
| IO_L19N_T3_VREF_34 | J1.116 | |
| IO_L19P_T3_34 | J1.114 | |
| IO_L20P_T3_34 | J1.134 | |
| IO_L20N_T3_34 | J1.136 | |
| IO_L21P_T3_DQS_34 | J1.102 | |
| IO_L21N_T3_DQS_34 | J1.104 | |
| IO_L22P_T3_34 | J1.126 | |
| IO_L22N_T3_34 | J1.128 | |
| IO_L23N_T3_34 | J1.123 | |
| IO_L23P_T3_34 | J1.125 | |
| IO_L24P_T3_34 | J1.119 | |
| IO_L24N_T3_34 | J1.121 |
Routing information[edit | edit source]
Routing implemented on Bora SoM allows the use of bank 34's signals as differential pairs as well as single-ended lines. Signals are grouped as denoted by the following table that details routing rules on Bora module. No carrier board guidelines can be provided, because these are application-dependent.
Pairs are highlighted with different colors. When used as differential pairs, differential impedence is 100 Ohm. When used as single-ended signals, impedence is 50 Ohm.
| Bora pin name | Individual trace length [mils] |
Intra-pair match [mils] |
Inter-pair match [mils] |
Group name |
| IO_L1N_T0_34 | 821.99 | 5 | 440 | BANK34 Diff group 1 |
| IO_L1P_T0_34 | 821.78 | 5 | 440 | BANK34 Diff group 1 |
| IO_L2N_T0_34 | 679.01 | 5 | 440 | BANK34 Diff group 1 |
| IO_L2P_T0_34 | 684 | 5 | 440 | BANK34 Diff group 1 |
| IO_L3N_T0_DQS_34 | 701.84 | 5 | 440 | BANK34 Diff group 1 |
| IO_L3P_T0_DQS_PUDC_B_34 | 1166.67 | 5 | 440 | BANK34 Diff group 1 |
| IO_L4N_T0_34 | 601.18 | 5 | 440 | BANK34 Diff group 1 |
| IO_L4P_T0_34 | 600.77 | 5 | 440 | BANK34 Diff group 1 |
| IO_L5N_T0_34 | 875.69 | 5 | 440 | BANK34 Diff group 1 |
| IO_L5P_T0_34 | 875.69 | 5 | 440 | BANK34 Diff group 1 |
| IO_L6N_T0_VREF_34 | 863.47 | 5 | 440 | BANK34 Diff group 1 |
| IO_L6P_T0_34 | 866.95 | 5 | 440 | BANK34 Diff group 1 |
| IO_L7N_T1_34 | 727.02 | 5 | 440 | BANK34 Diff group 1 |
| IO_L7P_T1_34 | 727.02 | 5 | 440 | BANK34 Diff group 1 |
| IO_L8N_T1_34 | 800.48 | 5 | 440 | BANK34 Diff group 1 |
| IO_L8P_T1_34 | 798.05 | 5 | 440 | BANK34 Diff group 1 |
| IO_L9N_T1_DQS_34 | 685.07 | 5 | 440 | BANK34 Diff group 1 |
| IO_L9P_T1_DQS_34 | 687.47 | 5 | 440 | BANK34 Diff group 1 |
| IO_L10N_T1_34 | 650.31 | 5 | 440 | BANK34 Diff group 1 |
| IO_L10P_T1_34 | 652.43 | 5 | 440 | BANK34 Diff group 1 |
| IO_L11N_T1_SRCC_34 | 640.93 | 5 | 440 | BANK34 Diff group 1 |
| IO_L11P_T1_SRCC_34 | 636.66 | 5 | 440 | BANK34 Diff group 1 |
| IO_L12N_T1_MRCC_34 | 702.74 | 5 | 440 | BANK34 Diff group 1 |
| IO_L12P_T1_MRCC_34 | 699.86 | 5 | 440 | BANK34 Diff group 1 |
| IO_L13N_T1_MRCC_34 | 844.5 | 5 | 440 | BANK34 Diff group 1 |
| IO_L13P_T1_MRCC_34 | 845.11 | 5 | 440 | BANK34 Diff group 1 |
| IO_L14N_T2_SRCC_34 | 864.85 | 5 | 440 | BANK34 Diff group 1 |
| IO_L14P_T2_SRCC_34 | 862.67 | 5 | 440 | BANK34 Diff group 1 |
| IO_L15N_T2_DQS_34 | 964.59 | 5 | 440 | BANK34 Diff group 1 |
| IO_L15P_T2_DQS_34 | 962.89 | 5 | 440 | BANK34 Diff group 1 |
| IO_L16N_T2_34 | 778.96 | 5 | 440 | BANK34 Diff group 1 |
| IO_L16P_T2_34 | 783.24 | 5 | 440 | BANK34 Diff group 1 |
| IO_L17N_T2_34 | 526.33 | 5 | 440 | BANK34 Diff group 1 |
| IO_L17P_T2_34 | 530.25 | 5 | 440 | BANK34 Diff group 1 |
| IO_L18N_T2_34 | 657.33 | 5 | 440 | BANK34 Diff group 1 |
| IO_L18P_T2_34 | 659.75 | 5 | 440 | BANK34 Diff group 1 |
| IO_L19N_T3_VREF_34 | 723.97 | 5 | 440 | BANK34 Diff group 1 |
| IO_L19P_T3_34 | 727.5 | 5 | 440 | BANK34 Diff group 1 |
| IO_L20N_T3_34 | 728.21 | 5 | 440 | BANK34 Diff group 1 |
| IO_L20P_T3_34 | 728.25 | 5 | 440 | BANK34 Diff group 1 |
| IO_L21N_T3_DQS_34 | 654.43 | 5 | 440 | BANK34 Diff group 1 |
| IO_L21P_T3_DQS_34 | 651.31 | 5 | 440 | BANK34 Diff group 1 |
| IO_L22N_T3_34 | 575.33 | 5 | 440 | BANK34 Diff group 1 |
| IO_L22P_T3_34 | 579.66 | 5 | 440 | BANK34 Diff group 1 |
| IO_L23N_T3_34 | 856.78 | 5 | 440 | BANK34 Diff group 1 |
| IO_L23P_T3_34 | 857.76 | 5 | 440 | BANK34 Diff group 1 |
| IO_L24N_T3_34 | 922.14 | 5 | 440 | BANK34 Diff group 1 |
| IO_L24P_T3_34 | 923.87 | 5 | 440 | BANK34 Diff group 1 |
FPGA Bank 35[edit | edit source]
The following table reports the available pins connected to bank 35:
| Pin Name | Conn. Pin | Notes |
| IO_0_35 | J1.155 | |
| IO_25_35 | J1.157 | |
| IO_L1N_T0_AD0N_35 | J1.193 | |
| IO_L1P_T0_AD0P_35 | J1.195 | |
| IO_L2P_T0_AD8P_35 | J1.197 | |
| IO_L2N_T0_AD8N_35 | J1.199 | |
| IO_L3P_T0_DQS_AD1P_35 | J1.185 | |
| IO_L3N_T0_DQS_AD1N_35 | J1.187 | |
| IO_L4P_T0_35 | J1.182 | |
| IO_L4N_T0_35 | J1.184 | |
| IO_L5P_T0_AD9P_35 | J1.174 | |
| IO_L5N_T0_AD9N_35 | J1.176 | |
| IO_L6N_T0_VREF_35 | J1.177 | |
| IO_L6P_T0_35 | J1.179 | |
| IO_L7P_T1_AD2P_35 | J1.133 | |
| IO_L7N_T1_AD2N_35 | J1.135 | |
| IO_L8N_T1_AD10N_35 | J1.137 | |
| IO_L8P_T1_AD10P_35 | J1.139 | |
| IO_L9P_T1_DQS_AD3P_35 | J1.159 | |
| IO_L9N_T1_DQS_AD3N_35 | J1.161 | |
| IO_L10P_T1_AD11P_35 | J1.145 | |
| IO_L10N_T1_AD11N_35 | J1.147 | |
| IO_L11N_T1_SRCC_35 | J1.141 | |
| IO_L11P_T1_SRCC_35 | J1.143 | |
| IO_L12N_T1_MRCC_35 | J1.171 | |
| IO_L12P_T1_MRCC_35 | J1.173 | |
| IO_L13P_T2_MRCC_35 | J1.189 | |
| IO_L13N_T2_MRCC_35 | J1.191 | |
| IO_L14P_T2_AD4P_SRCC_35 | J1.149 | |
| IO_L14N_T2_AD4N_SRCC_35 | J1.151 | |
| IO_L15N_T2_DQS_AD12N_35 | J1.152 | |
| IO_L15P_T2_DQS_AD12P_35 | J1.154 | |
| IO_L16N_T2_35 | J1.178 | |
| IO_L16P_T2_35 | J1.180 | |
| IO_L17P_T2_AD5P_35 | J1.163 | |
| IO_L17N_T2_AD5N_35 | J1.165 | |
| IO_L18P_T2_AD13P_35 | J1.148 | |
| IO_L18N_T2_AD13N_35 | J1.150 | |
| IO_L19N_T3_VREF_35 | J1.181 | |
| IO_L19P_T3_35 | J1.183 | |
| IO_L20P_T3_AD6P_35 | J1.160 | |
| IO_L20N_T3_AD6N_35 | J1.162 | |
| IO_L21P_T3_DQS_AD14P_35 | J1.167 | |
| IO_L21N_T3_DQS_AD14N_35 | J1.169 | |
| IO_L22N_T3_AD7N_35 | J1.156 | |
| IO_L22P_T3_AD7P_35 | J1.158 | |
| IO_L23N_T3_35 | J1.166 | |
| IO_L23P_T3_35 | J1.168 | |
| IO_L24P_T3_AD15P_35 | J1.170 | |
| IO_L24N_T3_AD15N_35 | J1.172 |
Routing information[edit | edit source]
Routing implemented on Bora SoM allows the use of bank 35's signals as differential pairs as well as single-ended lines. Signals are grouped as denoted by the following table that details routing rules on Bora module. No carrier board guidelines can be provided, because these are application-dependent.
Pairs are highlighted with different colors. When used as differential pairs, differential impedence is 100 Ohm. When used as single-ended signals, impedence is 50 Ohm.
| Bora pin name | Individual trace length [mils] |
Intra-pair match [mils] |
Inter-pair match [mils] |
Group name |
| IO_L1N_T0_AD0N | 1653.52 | 5 | 930 | BANK35 Diff group 1 |
| IO_L1P_T0_AD0P | 1656.04 | 5 | 930 | BANK35 Diff group 1 |
| IO_L2N_T0_AD8N | 1830.25 | 5 | 930 | BANK35 Diff group 1 |
| IO_L2P_T0_AD8P | 1828.16 | 5 | 930 | BANK35 Diff group 1 |
| IO_L3N_T0_DQS_AD1N | 1487.81 | 5 | 930 | BANK35 Diff group 1 |
| IO_L3P_T0_DQS_AD1P | 1487.81 | 5 | 930 | BANK35 Diff group 1 |
| IO_L4N_T0 | 1450.82 | 5 | 930 | BANK35 Diff group 1 |
| IO_L4P_T0 | 1447.23 | 5 | 930 | BANK35 Diff group 1 |
| IO_L5N_T0_AD9N | 1394.95 | 5 | 930 | BANK35 Diff group 1 |
| IO_L5P_T0_AD9P | 1394.98 | 5 | 930 | BANK35 Diff group 1 |
| IO_L6N_T0_VREF | 1501.68 | 5 | 930 | BANK35 Diff group 1 |
| IO_L6P_T0 | 1499.17 | 5 | 930 | BANK35 Diff group 1 |
| IO_L7N_T1_AD2N | 903.67 | 5 | 930 | BANK35 Diff group 1 |
| IO_L7P_T1_AD2P | 900.45 | 5 | 930 | BANK35 Diff group 1 |
| IO_L8N_T1_AD10N | 1106.07 | 5 | 930 | BANK35 Diff group 1 |
| IO_L8P_T1_AD10P | 1106.37 | 5 | 930 | BANK35 Diff group 1 |
| IO_L9N_T1_DQS_AD3N | 1010.9 | 5 | 930 | BANK35 Diff group 1 |
| IO_L9P_T1_DQS_AD3P | 1011.88 | 5 | 930 | BANK35 Diff group 1 |
| IO_L10N_T1_AD11N | 1132.74 | 5 | 930 | BANK35 Diff group 1 |
| IO_L10P_T1_AD11P | 1132.24 | 5 | 930 | BANK35 Diff group 1 |
| IO_L11N_T1_SRCC | 1083.67 | 5 | 930 | BANK35 Diff group 1 |
| IO_L11P_T1_SRCC | 1086.34 | 5 | 930 | BANK35 Diff group 1 |
| IO_L12N_T1_MRCC | 1266.88 | 5 | 930 | BANK35 Diff group 1 |
| IO_L12P_T1_MRCC | 1266.88 | 5 | 930 | BANK35 Diff group 1 |
| IO_L13N_T2_MRCC | 1561.25 | 5 | 930 | BANK35 Diff group 1 |
| IO_L13P_T2_MRCC | 1565.9 | 5 | 930 | BANK35 Diff group 1 |
| IO_L14N_T2_AD4N_SRCC | 1310.96 | 5 | 930 | BANK35 Diff group 1 |
| IO_L14P_T2_AD4P_SRCC | 1314.72 | 5 | 930 | BANK35 Diff group 1 |
| IO_L15N_T2_DQS_AD12N | 1390.3 | 5 | 930 | BANK35 Diff group 1 |
| IO_L15P_T2_DQS_AD12P | 1390.3 | 5 | 930 | BANK35 Diff group 1 |
| IO_L16N_T2 | 1328.03 | 5 | 930 | BANK35 Diff group 1 |
| IO_L16P_T2 | 1323.99 | 5 | 930 | BANK35 Diff group 1 |
| IO_L17N_T2_AD5N | 1066.44 | 5 | 930 | BANK35 Diff group 1 |
| IO_L17P_T2_AD5P | 1066.44 | 5 | 930 | BANK35 Diff group 1 |
| IO_L18N_T2_AD13N | 1274.72 | 5 | 930 | BANK35 Diff group 1 |
| IO_L18P_T2_AD13P | 1271.59 | 5 | 930 | BANK35 Diff group 1 |
| IO_L19N_T3_VREF | 1491.93 | 5 | 930 | BANK35 Diff group 1 |
| IO_L19P_T3 | 1490.98 | 5 | 930 | BANK35 Diff group 1 |
| IO_L20N_T3_AD6N | 1348.54 | 5 | 930 | BANK35 Diff group 1 |
| IO_L20P_T3_AD6P | 1348.54 | 5 | 930 | BANK35 Diff group 1 |
| IO_L21N_T3_DQS_AD14N | 1217.94 | 5 | 930 | BANK35 Diff group 1 |
| IO_L21P_T3_DQS_AD14P | 1219.83 | 5 | 930 | BANK35 Diff group 1 |
| IO_L22N_T3_AD7N | 1209.1 | 5 | 930 | BANK35 Diff group 1 |
| IO_L22P_T3_AD7P | 1212.95 | 5 | 930 | BANK35 Diff group 1 |
| IO_L23N_T3 | 1279.78 | 5 | 930 | BANK35 Diff group 1 |
| IO_L23P_T3 | 1282 | 5 | 930 | BANK35 Diff group 1 |
| IO_L24N_T3_AD15N | 1282.1 | 5 | 930 | BANK35 Diff group 1 |
| IO_L24P_T3_AD15P | 1279.15 | 5 | 930 | BANK35 Diff group 1 |
