BORA Lite SOM/BORA Lite Hardware/Electrical Thermal management and heat dissipation

History
Issue Date	Notes
2021/09/22	New documentation layout

Electrical Thermal management and heat dissipation

Providing maximum power consumption of a system-on-module (SOM for short) is virtually impossible because it is extremely hard to define the worst case. This is even more true in case of BORA Lite , where this is affected by the software running on Processing System (PS) side and the Programmable Logic (PL) configuration.

For this reason, several real use cases have been considered rather than indicating a theoretical maximum power consumption value that would be useless for the majority of system integrators, because it likely would lead to an oversized power supply unit.

Again, it is worth remembering that BORA Lite platform is so flexible that is practically impossible to test for all possible configurations and applications on the market. The use cases here presented should cover most of the real-world scenarios. However, actual customer applications might require more power than the values reported here. Generally speaking, application-specific requirements have to be taken into consideration in order to size the power supply unit and to implement thermal management properly.

The following sections describe in detail the testbeds that have been used. All of them make use of a specific FPGA bistream that has been developed to perform stress tests on BORA Lite platforms [1]. These tests have been conducted in a climatic chamber that allows setting environment temperature surrounding DUT, denoted in the rest of the document as Tamb. Tj denotes Zynq's junction temperature instead.

FPGA bitstream - that in turn is built upon this core - allocates most of FPGA resources. All of them are clocked by one clock signal whose frequency is selectable by the PS at runtime. This allows to flexibly change DUT current absorption and, consequently, the heat it generates.

For information related to temperature measurements, see also this section.

[1] These tests are part of the standard qualification procedure of DAVE Embedded Systems products. Their primary goal is to verify the proper operating of the DUT under conditions of usage that are extremely demanding. Data reported here were excerpted from the logs generated by such tests.

Configuration

Testbed

Measurements have been performed on the following platform:

• BORA Lite SOM: DBTD4111I0R
  • this model is based on Zynq XC7Z020-1I (Tj: -40°C / +100°C)
• carrier board: BORAX EVB
• processor frequency: 667 MHz
• FPGA frequency
  • 1 MHz (Tamb = +85°C)
  • 140 MHz (Tamb = +-40°C)
• U-Boot: 2017.01-belk-4.1.4 (Jul 28 2021 - 23:20:09 +0200), Build: belk-4.1.4
• Linux kernel: 4.9.0-belk-4.1.0-xilinx (jenkins@linuxserver2) (gcc version 6.2.1 20161016 (Linaro GCC 6.2-2016.11) ) #1 SMP PREEMPT Tue Dec 24 11:34:28 CET 2019
• root file system mounted over Gigabit Ethernet link.

Please note that, when Tamb has been set to +85°C, the BORA LiteSOM has been coupled to a passive heat sink to prevent exceeding maximum Zynq's junction temperature.

At the application level, PS executes concurrently several tasks including:

• two instances of burnCortexA9
• periodic reading of Zynq's ADCs
• periodic reading of voltage/current probe (Texas Instruments INA226) connected to the SOM's power rail
• one instance of memtester, exercising 50 MByte of SDRAM
• endless loop of writing/reading/verifying operations on microSD card
• endless loop of writing/reading/verifying operations on memory stick connected to the USB port
• mtd_test on NAND (mtd_speedtest, mtd_stresstest, mtd_readtest, mtd_pagetest, mtd_subpagetest)
• ethernet iperf

Results

• Tamb: temperature of the ambient surrounding the DUT
• Tj_max: maximum Zynq's junction temperature measured during the test
• P_max: maximum power absorption of BORA Lite SOM

Tamb [°C]	Tj_max [°C]	FPGA clock frequency [MHz]	P_max [W]
85	116.4 [1]	1	7.85
-40	56.8	140	7.87

[1] In spite of the use of heat sink, this value exceeds maximum valued declared by the manufacturer. This is acceptable in case of stress tests, where it is possible that parts of the DUT get damaged.

Hotspots

The following picture illustrates the two typical hotsposts when the BORA Lite SOM is running: as seen in the picture, the SOC and the ethernet PHY are the two hottest points to take into account for the Power dissipation management

BORA Lite hotspots