AXEL Lite SOM/AXEL Lite Hardware/Peripherals/Ethernet

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History
Version Issue Date Notes
1.0.0 Oct 2020 New documentation layout


Peripheral Ethernet[edit | edit source]

The AXEL Lite i.MX6 SOC ENET implements a triple-speed 10/100/1000/1000-Mbit/s ethernet MAC interface.

Description[edit | edit source]

The Ethernet interface available on AXEL Lite is based on i.MX6 ethrnet MAC and ax external ethernet PHY.

The Ethernet MAC supports the following standards and features:

  • compliant with the IEEE802.3-2002 standard
  • compatibility with half- or full-duplex 10/100-Mbit/s and full-duplex gigabit1 Ethernet LANs
  • compliant with the AMD magic packet detection with interrupt for node remote power management
  • hardware acceleration block to optimize the performance of network controllers providing TCP/IP, UDP, and ICMP protocol services

Known limitations[edit | edit source]

According to i.MX6 chip errata ERR004512, the ethernet performances are limited to 470Mbps:

ERR004512 ENET: 1 Gb Ethernet MAC (ENET) system limitation

Description:
The theoretical maximum performance of 1 Gbps ENET is limited to 470 Mbps (total for Tx and Rx). The actual measured performance in an optimized environment is up to 400 Mbps.

Projected Impact:Minor. 
Limitation of ENET throughput to around 400 Mbps. ENET remains fully compatible to 1Gb standard in terms of protocol and physical signaling. If the TX and RX peak data rate is higher than 400 Mbps, there is a risk of ENET RX FIFO overrun

Pin mapping[edit | edit source]

The Pin mapping is described in the Pinout table section