AXEL Lite SOM/AXEL Lite Evaluation Kit/pdf

From DAVE Developer's Wiki
Jump to: navigation, search


Getting started[edit | edit source]

Kit Identification Codes[edit | edit source]

The development kits (DESK, XELK, XUELK, BELK, etc.) are identified by a couple of codes:

  1. P/N Part Number identification code
  2. S/N Serial Number identification code

These codes are printed on a label sticked to the box containing the kit.

For example, the following picture shows such a label of an Axel Ultra XELK (XELK-H-S) with Serial Number 0CFA

Label of Axel Ultra XELK (XELK-H-S)

These codes are required to complete the registration process of the kit.



Unboxing[edit | edit source]

Once you've received the kit, please open the box and check the kit contents with the packing list included in the box, using the table on this chapter as a reference.

The hardware components (SOM, carrier boards and display) are pre-assembled, as shown in the picture below:


AXEL Lite-EVK-kit-unboxing.png

Kit Contents[edit | edit source]

The following table list the kit components:

Component Description
AXEL Lite-EVK-kit-SBC.png
SBCX with AXEL Lite SOM
AXEL Lite-EVK-kit-display.png
Ampire AM-800480SETMQW
7” 800x480 LCD display
LVDS interface
DWS top.png
DWS WiFi module
AXEL Lite-EVK-kit-power-supply.png
AC/DC Single Output Wall Mount adapter
Output: +12V – 2.0 A
AXEL Lite-EVK-kit-serial-cable.png
DB9 Male Serial port adapter
AXEL Lite-EVK-kit-sdcard.png
MicroSDHC card with SD adapter

Order codes[edit | edit source]

Order code Description
SBCX562013C3R-00 This code refers to the default configuration detailed above

microSD Layout[edit | edit source]

The microSD provided with is used to store:

  • a bootable partition (mmcblk0p1, vfat) containing:
    • binary images (u-boot and kernel images)
    • documentation
    • DVDK virtual machine image
  • root file system partition (mmcblk0p2, ext3)


Connections[edit | edit source]

This section describes how to quick start the Evaluation Kit. The picture below shows the AXEL Lite SOM inserted into the Evaluation Kit:

AXEL Lite-EVK-kit-SBC.png

The system is programmed to automatically boot Linux at power up, loading the bootloader, the kernel and device tree image and the root file system from the SD card memory.

To connect to the system:

  • connect the 12Vcc power supply to JP2 on the board
  • connect the DB9 adapter bracket to the J22 connector on the SBCX and connect the DB9 connector to the PC COM port through a NULL-modem cable (not provided)
    • start your favorite terminal emulator software on PC (eg: PuTTY, Minicom, ...); communication parameters are 115200,N,8,1
  • (optional) connect the ethernet cable from your LAN hub/switch to the J16 RJ45 connector
    • start SSH, using the following parameters:

First boot[edit | edit source]

Once power has been applied, U-Boot bootloader will be executed and the debug messages will be printed on the serial console. U-Boot automatically runs the autoboot macro, that loads the kernel/dtb and launches it with the options for mounting the root file system from the SD card.

At the end of the boot process, a demo application is launched and you can interact with the system using the touchscreen. The Linux shell is available on the serial console. Moreover, both telnet and ssh services are available to connect to the system through the network.

Serial console[edit | edit source]

A simple Windows serial and SSH/telnet client and terminal can be downloaded from here.

The following picture shows the serial setup for connecting to the EVK:


PuTTY connection using Serial Port


once selected the COM[x] serial port, click the Open button which starts the terminal. Once powered, the EVK shows the U-boot debug messages printed on the serial console.

Connecting through SSH[edit | edit source]

Once the ethernet port has been configured, the following picture shows the SSH connection to the EVK (in the following example, a 192.168.0.89. IP address is used):


PuTTY connection using SSH


once selected the IP address, click the Open button which starts the terminal. Once connected, the EVK shows the linux kernel prompt login for inserting the login:


PuTTY SSH login


Then use the root login username (there is no password):


PuTTY SSH connected


Boot Configurations[edit | edit source]

AXEL Lite Evaluation Board is built upon i.MX6 family processor.

The following sections detail boot configuration options, which differ depending on the SoM.

For more information about AXEL Lite boot options, see the related page on AXEL Lite Hardware Manual.

Available options[edit | edit source]

Boot modes can be selected by J32 jumper switches which acts directly on J2.20 BOOT_MODE_SEL SOM pin.

Boot options order code Jumper mounted Jumper not mounted
Boot from NAND SD NAND
Boot from NOR SD NOR
Boot option


Reset Button[edit | edit source]

AXEL Lite Evaluation Board has a pushbutton directly connected to the PMIC_PWRON signal which drives a SOM hardware reset.

S3 is the hardware reset button.

Reset button

General Information[edit | edit source]

Product Highlights[edit | edit source]

The SBCX platform presented here provides a compact solution for any industry and can be easily interfaced with Plant Automation Control thanks to IEC-61131 SW language environment and/or other plug-ins like QT framework, Chromium web based GUI or multimedia GStreamer video applications.

The following table summarizes the main hardware and software features available with SBCX:

Hardware[edit | edit source]

Subsystem Characteristics
CPU NXP i.MX6 Solo/Dual/Quad core
USB Host and device
Serial Ports RS232/422/485 mutliprotocol
LVTTL UART
CAN interface
Ethernet 10/100/1000Mbps
Display Dual LVDS interface
WIDE TM interface with 24bit RGB
Video HDMI and MIPI (optional) interfaces
Touchscreen Resistive and capacitive
Audio Stereo OUT and MIC in (on 2x2.54mm connector)
Connectivity Bluetooth and Wi-Fi
PSU 12 to 24V DC
Mechanical Dimensions 85x156mm - Standard DIN (9modules)

Software[edit | edit source]

Subsystem Options
Operating System Linux, Android
Distribution Yocto, Debian, Buildroot
Graphical Framework Qt, Android, Chromium browser
Applications SoftPLC, IoT runtime, nodeJS


Block diagram[edit | edit source]

The following picture shows a simplified block diagram of the AXEL Lite SOM Evaluation kit.

Main functional subsystems and interfaces are depicted.

AXEL Lite Evaluation kit Block diagram


The heart of the Evaluation Kit is the AXEL Lite SOM module: please refer to the following Product Highlights page for the Evaluation Kit product highlights information.

Here below a summary for the main characteristics of the Kit.

Features Summary[edit | edit source]

Feature Specifications
Supported SOM NXP i.MX6 SOM
Serial Ports 1x UART RS232/RS422/RS485
1x LVTTL UART
1x UART RS232 on pin strip (debug port)
Connectivity 1x Fast Ethernet on RJ45 connector
1x CAN port with PHY
DWM Wireless module (optional)
Display 2x LVDS
HDMI
WIDE™ display interface
Storage 1x microSD slot
USB 1x USB 2.0 Host port
1x USB OTG port
Audio TLV320AIC310 codec
Miscellaneous Resistive 4-wire touch controller
GPIOs
JTAG
RTC battery

Electrical, Mechanical and Environmental Specifications[edit | edit source]

Electrical / Mechanicals Specifications
Supply voltage + [12 - 24] V
Dimensions 156 mm x 84 mm
Weight 107,6 g
Operating Temperature 0..70 °C

(*) WIDE™ = Wise Interface Display Expander


Interfaces and Connectors[edit | edit source]

Power Supply[edit | edit source]

Description[edit | edit source]

Power is provided through the J2 connector. Power voltage range is +[12-24 V].

J2 is a two pins MSTBA 2.5/2-G-5.08 Phoenix connector.

Power Supply connector

Signals[edit | edit source]

The following table describes the interface signals:

Pin# Pin function Pin Notes
1 DGND Ground
2 VIN +[12-24 V]

Power LED[edit | edit source]

DL1 is a green LED (placed near battery holder) shows the status of the power input. This LED is ON when a valid power supply is present.



CPU connector[edit | edit source]

Description[edit | edit source]

J10 is the 204-pins SODIMM mating connector for the AXEL LITE SOM.


CPU connector


For a detailed description of the SOM pinout, please refer to the AXEL Lite SOM Hardware Manual.



On board JTAG connector[edit | edit source]

JTAG signals are routed to a dedicated connector on the AXEL Lite PCB.

The connector is placed on the top side of the PCB, at the upper-right corner (please see the picture below).

Axellite-jtag-conn.png

J7 - SOM Connector's pinout[edit | edit source]

J7 footprint mates with Samtec FSI-110-03-G-S connector. The following table reports the connector's pinout:

JTAG connector
Pin# Pin name Function ARM-20 JTAG Notes
1 DGND - 4,6,8,10,12,14,16,18,20 For example documented on Lauterbach specification
2 JTAG_TCK - 9 -
3 JTAG_TMS - 7 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
4 JTAG_TDO - 13 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
5 JTAG_TDI - 5 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
6 JTAG_nTRST - 3 (*) 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
7 CPU_PORn - 15 (*) -
8 N.C. - -
9 N.C. - -
10 JTAG_VREF - 1 3V3 (BOARD_PGOOD driven signal)

(*) keep the possibility to be unconnected

JD1 - EVB Connector's pinout[edit | edit source]

JD1 is a 10x1x2.54mm pinhole header. The following table reports the connector's pinout:

EVB JTAG connector
Pin# Pin name Function Notes
1 DGND -
2 JTAG_TCK - -
3 JTAG_TMS - 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
4 JTAG_TDO - 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
5 JTAG_TDI - 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
6 JTAG_nTRST - 10K pull-up to 3V3 (BOARD_PGOOD driven signal)
7 JTAG_nRST - -
8 N.C. - -
9 N.C. - -
10 JTAG_VREF -


Ethernet[edit | edit source]

Description[edit | edit source]

J16 is a standard RJ45 connectors connected to the SOM integrated ethernet controller and PHY.


Ethernet connector

Signals[edit | edit source]

The following table describes the interface signals:

Pin# SOM Pin# Pin name Pin function Pin Notes
11 J10.19 ETH0_TXRX0_P Transmit and receive pair 0 data +
10 J10.21 ETH0_TXRX0_M Transmit and receive pair 0 data -
4 J10.23 ETH0_TXRX1_P Transmit and receive pair 1 data +
3 J10.27 ETH0_TXRX2_P Transmit and receive pair 2 data +
2 J10.29 ETH0_TXRX2_M Transmit and receive pair 2 data -
5 J10.25 ETH0_TXRX1_M Transmit and receive pair 1 data -
8 J10.31 ETH0_TXRX3_P Transmit and receive pair 3 data +
9 J10.33 ETH0_TXRX3_M Transmit and receive pair 3 data -
17 J10.15 3V3_ETH1_LED2 Eth link led
20 J10.13 3V3_ETH1_LED1 Eth activity led

Device mapping[edit | edit source]

The network interface mapped at eth0 device in Linux.

Device usage[edit | edit source]

The peripheral is used the standard kernel interface and network protocol stack.



Console interface[edit | edit source]

Description[edit | edit source]

The Console interface available on the Evaluation Kit at the connector J22.

J22 is a 10 pin (5x2x2.54mm) header connector for the RS232 two-wires UART3 port, used for debug purposes (bootloader and operating system serial console).


Console connector

Signals[edit | edit source]

The following table describes the interface signals:

Pin# SOM Pin# Pin name Pin function Pin Notes
1,2,4,6,,7,8,10 - N.A. N.C. Not connected
3 J10.189 RS232_RX Receive line
3 J10.187 RS232_TX Transmit line
9 - DGND Ground

Device mapping[edit | edit source]

UART3 is mapped to /dev/ttymxc2 device in Linux. The peripheral is used as the default serial console, both for the bootloader and the kernel.

Device usage[edit | edit source]

To connect to the debug serial port:

  1. connect the DB9 adapter bracket to the J22 connector on the SBCX board
  2. connect a serial cable between DB9 connector and PC COM port through a NULL-modem cable (not provided)
  3. start your favorite terminal emulator software on PC (eg: PuTTY); communication parameters are: 115200,N,8,1


UARTs interface[edit | edit source]

Description[edit | edit source]

The UARTs interface available on the Evaluation Kit are mapped to the following connectors:

  • J25 is a 6x1x2.54mm horizontal socket header for the UART4 port. This is a Digilent Pmod™ Compatible connector for the UART Pmod™ Compatiblemodule (6-Pin Pmod™ Compatible Connector Digilent Pmod™ Interface Specification Type 4 UART)


PMOD configuration


  • J21 is a standard DB9 male connector for the configurable UART5 port. The board provides some configuration options for the selection of the UART mode (RS232/RS422/RS485 with auto-direction)


DB9 configuration

Signals[edit | edit source]

The following tables describes the interface signals

UART4[edit | edit source]

Pin# SOM Pin# Pin name Pin function Pin Notes
1 J10.50 PMOD_A0 Clear to send
2 J10.89 PMOD_A1 Transmit data
3 J10.91 PMOD_A2 Receive data
4 J10.40 PMOD_A3 Request to send
5 - DGND Ground
6 - 3V3 +3.3 V

UART5[edit | edit source]

Pin# SOM Pin# Pin name RS-232 RS-422 RS-485
1 - Not connected Not connected Not connected Not connected
2 J10.95 UART5_A UART5 receive line UART5_A UART5_A
3 J10.93 UART5_Y UART5 transmit line UART5_Y UART5_A
4 - Not connected Not connected Not connected Not connected
5 - DGND Ground Ground Ground
6 - Not connected Not connected Not connected Not connected
7 J10.105 UART5_Z UART5 Request To Send UART5_Z UART5_B
8 J10.107 UART5_B UART5 Clear To Send UART5_B UART5_B
9 - Not connected Not connected Not connected Not connected

The J19 and J20 jumpers are used to configure the UART mode, as reported below:

Jumper RS232 mode RS422 mode RS485 mode
1-3 open open closed
5-7 open closed open
9-11 open closed open
2-4 open open closed
6-8 open closed closed
10-12 open closed closed
13-15 open open closed
14-16 open open closed
J19 and J20 connectors
UART5 jumper configuration


Device mapping[edit | edit source]

  • UART4 is mapped to /dev/ttymxc3 device in Linux
  • UART5 is mapped to /dev/ttymxc4 device in Linux

Device usage[edit | edit source]

  • UART4 can be used with a PMOD adapter or with a TTL peripheral
  • UART5 is a MultiProtocol that support (after harware Jumper configuration) the RS232, RS4222 or RS485 protocols. The related device tree file has to be properly configured too for enabling the GPIO transceiver configuration, see Configuring the RS232/RS485 mode


micro SD interface[edit | edit source]

Description[edit | edit source]

The micro SD interface available on the Evaluation Kit at the connector J26.

J26 is a Micro-SD card header. This interface is connected to the USDHC1 controller of the i.MX6 CPU.

microSD connector

Signals[edit | edit source]

The following table describes the interface signals:

Pin# SOM Pin# Pin name Pin function Pin Notes
1 J10.79 SD_DAT2 Data 2
2 J10.81 SD_DAT3 Data 3
3 J10.83 SD_CMD CMD
4 - 3V3 +3.3 V
5 J10.85 SD_CLK Clock
6, 12 - DGND Ground
7 J10.75 SD_DAT0 Data 0
8 J10.77 SD_DAT1 Data 1
9, 10, 11 - SD_SHIELD Shield
13 J10.177 EIM_D19 Card detect

Device mapping[edit | edit source]

The microSD card is mapped to /dev/mmcblk0. The available partitions are shown as /dev/mmcblk0p1, /dev/mmcblk0p2, etc.

Device usage[edit | edit source]

The device can be mounted/accessed as a standard block device in Linux.



USB ports[edit | edit source]

Description[edit | edit source]

SBCX provides two USB ports, one Host and one device:

  • J17 is a standard USB Host 2.0 Type A connector
USB Host connector


  • J18 is a micro-AB type receptacle for a USB device connection: this interface can operate in Device (peripheral) mode and - optionally - in Host mode


USB device connector

Signals[edit | edit source]

The following table describes the interface signals

USB Host[edit | edit source]

Pin# SOM Pin# Pin name Pin function Pin Notes
1 J10.188 USB_HOST_VBUS VBUS
2 J10.202 USB_HOST_DN USB Host Data -
3 J10.200 USB_HOST_DP USB Host Data +
4 - DGND Ground

USB Device[edit | edit source]

Pin# SOM Pin# Pin name Pin function Pin Notes
6, 7, 8, 9 - USB_OTG_SH Shield
1 J10.186 USB_OTG_VBUS VBUS This pin can be powered (for Host mode) (*)
2 J10.196 USB_OTG_DN USB OTG Data -
3 J10.198 USB_OTG_DP USB OTG Data +
4 J10.192 ENET_RX_ER USB OTG ID
5 - GND Ground

Device usage[edit | edit source]

The USB Host port can be used under Linux for connecting USB peripheral devices: the related peripheral driver has to be integrated into the Linux kernel.

The USB Device feature can be easily tested using the Mass Storage Gadget driver. (*) This port can operate in Host mode using a proper BOM mount option. See the EVK schematics for more info



LVDS[edit | edit source]

Description[edit | edit source]

SBCX provides two LVDS interfaces, LVDS0 and LVDS1.

  • J8 is a Hirose (cod. DF13A-20DP-1.25V) double row 1.25mm pitch miniature crimping connector
  • J9 is a Hirose (cod. DF13A-20DP-1.25V) double row 1.25mm pitch miniature crimping connector


LVDS connectors

Signals[edit | edit source]

The following tables describes the interface signals

LVDS0[edit | edit source]

Pin# SOM Pin# Pin name Pin function Pin Notes
1, 2 - 3.3V_LCD0 3.3 V
3, 4, 7, 10,

13, 16, 19

- DGND Ground
5 J10.137 LVDS0_TX0_N LVDS Data 0 -
6 J10.139 LVDS0_TX0_P LVDS Data 0 +
8 J10.141 LVDS0_TX1_N LVDS Data 1 -
9 J10.143 LVDS0_TX1_P LVDS Data 1 +
11 J10.145 LVDS0_TX2_N LVDS Data 2 -
12 J10.147 LVDS0_TX2_P LVDS Data 2 +
14 J10.133 LVDS0_CLK_N LVDS Clock -
15 J10.135 LVDS0_CLK_P LVDS Clock +
17 J10.149 LVDS0_P17 Mount options LVDS0_TX3_N option
18 J10.151 LVDS0_P18 Mount options LVDS0_TX3_P option
20 J10.46 LVDS0_P20 Mount options GND or PWM (J10.46) option

LVDS1[edit | edit source]

Pin# SOM Pin# Pin name Pin function Pin Notes
1, 2 - 3.3V_LCD0 3.3 V
3, 4, 7, 10,

13, 16, 19

- DGND Ground
5 J10.159 LVDS1_TX0_N LVDS Data 0 -
6 J10.161 LVDS1_TX0_P LVDS Data 0 +
8 J10.163 LVDS1_TX1_N LVDS Data 1 -
9 J10.165 LVDS1_TX1_P LVDS Data 1 +
11 J10.167 LVDS1_TX2_N LVDS Data 2 -
12 J10.169 LVDS1_TX2_P LVDS Data 2 +
14 J10.155 LVDS1_CLK_N LVDS Clock -
15 J10.157 LVDS1_CLK_P LVDS Clock +
17 J10.171 LVDS1_P17 Mount options LVDS1_TX3_N option
18 J10.173 LVDS1_P18 Mount options LVDS1_TX3_P option
20 J10.46 LVDS1_P20 Mount options GND or PWM (J10.46) option

Device mapping[edit | edit source]

  • LVDS0 is mapped to /dev/fb0 device in Linux
  • LVDS1 is mapped to the corresponding device driver in Linux, depending on the ldb peripheral configuration in the device tree. The default value is disabled but can be mapped to /dev/fb2 (second and independent LCD panel) or can be the second LVDs channel for a dual-channel LCD panel configuration (like a 1920x1080 DUAL LVDS channel LCD panel)

Power sequence[edit | edit source]

Most of the LCD panels have many supplies and need a specific timing to power the rails and start the signals.

The Evaluation Kit provides GPIO controlled power rails that can be leveraged both at bootloader and kernel level to meet any specifications.

The following sections describe the available rails:

3V3_LCD[edit | edit source]

The most common voltage to supply the LCD panel internal logic:

  • rail 3V3_LCD0 is enabled by GPIO1_IO00
  • rail 3V3_LCD1 is enabled by GPIO1_IO02

5V_LCD[edit | edit source]

The most common voltage to supply the LCD panel backlight:

  • rail 5V_LCD0 is enabled by SD3_DATA1
  • rail 5V_LCD1 is enabled by SD3_DATA0

Device usage[edit | edit source]

The associated framebuffer device is accessed in Linux through the standard graphic access.



Touchscreen[edit | edit source]

Description[edit | edit source]

The 4-wire resistive touch controller signals are routed to J50, which is a 4 pin (1mm pitch vertical) ZIF connector for the 4-wires resistive controller.

The touch controller is a TI TSC2003 device, connected to the I²C2 bus (address 0x1001000b).

Touchscreen connector

Signals[edit | edit source]

The following table describes the interface signals:

Pin# SOM Pin# Pin name Pin function Pin Notes
1 - TSC_YP Touch controller Y+
2 - TSC_XP Touch controller X+
3 - TSC_YM Touch controller Y-
4 - TSC_XM Touch controller X-

Device mapping[edit | edit source]

The device is typically mapped to /dev/touchscreen0 device in Linux.

The touch controller is attached to the generic Linux input event interface (evdev).

Device usage[edit | edit source]

The simplest tools for touch screen management are the tslib library and ts_tools utilities. To calibrate the touch screen, the ts_calibrate command line tool is available. After calibration, the touch screen can be tested using the graphical ts_test utility or the ts_print command line tool.



HDMI[edit | edit source]

Description[edit | edit source]

SBCX provides an HDMI 1.4a compatible interface, including the HDMI controller and PHY, routed to a standard HDMI Type A receptacle.


HDMI connectors

Signals[edit | edit source]

The following table describes the interface signals:

Pin# SOM Pin# Pin name Pin function Pin Notes
1 J10.125 HDMI_D2P TX pair 2 data +
3 J10.123 HDMI_D2N TX pair 2 data -
4 J10.121 HDMI_D1P TX pair 1 data +
6 J10.119 HDMI_D1N TX pair 1 data -
7 J10.117 HDMI_D0P TX pair 0 data +
9 J10.115 HDMI_D0N TX pair 0 data -
10 J10.113 HDMI_CLKP Tx pair clock +
12 J10.111 HDMI_CLKN Tx pair clock -
13 J10.127 CE_REMOTE_OUT Consumer Electric Control
15 J10.101 DDC_CLK_OUT I2C clock
16 J10.103 DDC_DAT_OUT I2C data
18 - 5V +5V output Internally limited to 135mA
19 J10.129 HDMI_HP_OUT Hotplug detection
2, 5, 8,
11, 17
- DGND Ground
14 - NC Not connected
20, 21,
22, 23
- SH_HDMI Shield

Device mapping[edit | edit source]

HDMI video is mapped to the corresponding device driver in Linux, depending on the device tree configuration. If this is the only video output, then the default value is mapped to /dev/fb0.

Device usage[edit | edit source]

The associated framebuffer device is accessed in Linux through the standard graphic access.



MIPI[edit | edit source]

Description[edit | edit source]

J34 is a 20x2x1.00 mm One Piece Interface dedicated to the MIPI camera input and the PCI Express expansion bus interface.

This connector can be used as a Camera Interfacefor connecting a MIPI CSI-2 camera device.

Signals[edit | edit source]

The following table describes the interface signals:

Pin# SOM Pin# Pin name Pin function Pin Notes
1 - 5V_IN
3 J10.97 AUX_PWR_EN connected to GPIO4_IO10 (KEY_COL2)
13 - AUX_USB_DN
15 - AUX_USB_DP
19 J10.53 CAM_PWD
20 - 3V3
21 J10.51 CAM_RSTn
22 J10.60 CAM_CLK
25 J10.102 CSI_CLK0M_1
26 J10.48 CSI_SDA
27 J10.104 CSI_CLK0P_1
28 J10.38 CSI_SCL
31 J10.110 CSI_D1M_1
32 J10.106 CSI_D0M_1
33 J10.112 CSI_D1P_1
34 J10.108 CSI_D0P_1
37 J10.118 CSI_D3M_1
38 J10.114 CSI_D2M_1
39 J10.120 CSI_D3P_1
40 J10.116 CSI_D2P_1
5, 8, 11,
14, 17, 23,
24, 29, 30,
35, 36
- DGND Ground

Device mapping[edit | edit source]

The MIPI CSI peripheral is mapped to the corresponding /dev/video<X> device in Linux. The device mapping depends on the device tree configuration.



PCIe[edit | edit source]

Description[edit | edit source]

J34 is a 20x2x1.00 mm One Piece Interface dedicated to the MIPI camera input and the PCI Express expansion bus interface.

Signals[edit | edit source]

The following table describes the interface signals:

Pin# SOM Pin# Pin name Pin function Pin Notes
1 - 5V_IN
2 J10.64 PCIE_WAKE_B
3 J10.97 AUX_PWR_EN connected to GPIO4_IO10 (KEY_COL2)
4 J10.76 PCIE_RST_B
6 J10.74 PCIE_DIS_B
7 J10.84 PCIE_CLKN
9 J10.86 PCIE_CLKP
10 J10.92 PCIE_RXN_R
12 J10.94 PCIE_RXP_R
16 J10.96 PCIE_TXN_C
18 J10.98 PCIE_TXP_C
20 - 3V3
25 J10.102 CSI_CLK0M_1
26 J10.48 CSI_SDA
28 J10.38 CSI_SCL
5, 8, 11,
14, 17, 23,
24, 29, 30,
35, 36
- DGND Ground

Device mapping[edit | edit source]

The PCI express peripheral is mapped to the corresponding device in Linux depending on the associated kernel device driver and on the device tree configuration.



CAN[edit | edit source]

Description[edit | edit source]

The CAN interface available on the Evaluation Kit at the connector J23.

J23 is a 3x2x2.54mm header that provides the CAN bus port compatible with the CAN 2.0B protocol. The CAN transceiver is implemented on the AXEL LITE SOM.


CAN connector

Signals[edit | edit source]

The following table describes the interface signals:

Pin# SOM Pin# Pin name Pin function Pin Notes
1,2 - N.A. N.C. Bus termination
3 J10.44 CAN_M Low bus line
4 J10.42 CAN_P High bus line
5 - CAN_SHIELD Shield
6 - DGND Ground

Device mapping[edit | edit source]

CAN device is mapped to can0 device in Linux. The peripheral can be configured using ifconfig and ip link utilities.

Device usage[edit | edit source]

Inserting a jumper on pins 1 and 2 enables 120Ω bus termination.

CAN electrical connections


Audio[edit | edit source]

Description[edit | edit source]

The Audio interface available on the Evaluation Kit at the connector J27.

J27 is a 7x2x2.54mm header. The audio codec is a TLV320AIC3100 device connected to the I²S interface.

Audio connector

Signals[edit | edit source]

The following table describes the interface signals:

Pin# Pin name Pin function Pin Notes
4, 5, 8, 9 AGNDM Analog Ground
1 AUX_RES Analog ground
2 AUXR Microphone in right
3 AUXL Microphone in left
6 SPKM Speaker out (negative)
7 SPKP Speaker out (positive)
10 HSOR Audio Headset right
11 HSOL Audio Headset left
12 MIC_BIAS Microphone bias
13 AUD_HP_VGND Analog ground

Device mapping[edit | edit source]

The Audio interface is mapped to card0 ALSA device in Linux. The ALSA peripheral #0: sbcx-audio-tlv320aic3100 can be accessed via alsa-utils with hardware address 0.

Device usage[edit | edit source]

For example, it is possible to play a file using aplay -D hw:0,0 device access.



RTC[edit | edit source]

Description[edit | edit source]

SBCX uses the RTC device provided by AXEL Lite PMIC

An external lithium battery (like Panasonic ML-2020/G1AN rechargeable battery) can be optionally mounted on SBCX.


Lithium battery

Signals[edit | edit source]

The following table describes the interface signals:

Pin# SOM Pin# Pin name Pin function Pin Notes
- J10.14 PMIC_LICELL coin cell battery network has to be properly configured for lithium battery recharge current

Device mapping[edit | edit source]

RTC is mapped to /dev/rtc0 device in Linux.

Device usage[edit | edit source]

The peripheral can be accessed through the date and hwclock linux commands.



DWM[edit | edit source]

Description[edit | edit source]

J24 is a 30-pins 0.50mm Pitch SlimStack™ Receptacle. This connector is dedicated to the DWM optional add-on module.

The module is built around an LS Research TiWi-BLE Integrated Transceiver Modules for WLAN 802.11 b/g/n and Bluetooth. The module implements the necessary PHY/MAC layers to support WLAN applications in conjunction with a host processor over a SDIO interface. The module also provides a Bluetooth platform through the HCI transport layer. Both WLAN and Bluetooth share the same antenna port.

DWM connector

Signals[edit | edit source]

The following table describes the interface signals:

Pin# SOM Pin# Pin name Pin function Pin Notes
1, 2 - 5V
3, 4 - 3.3V
5, 6, 9, 10, 19 - DGND Ground
7 J10.69 TIWI_MMC2_CMD
8 J10.71 TIWI_MMC2_CLK
11 J10.61 TIWI_MMC2_DAT0
13 J10.63 TIWI_MMC2_DAT1
15 J10.65 TIWI_MMC2_DAT2
17 J10.67 TIWI_MMC2_DAT3
21 J10.47 UART2_RX Used only for BT peripheral
23 J10.55 UART2_CTS Used only for BT peripheral
24 J10.39 TIWI_BT_F5
25 J10.49 UART2_TX Used only for BT peripheral
26 J10.41 TIWI_BT_F2
27 J10.59 UART2_RTS Used only for BT peripheral
28 J10.43 TIWI_IRQ
29 J10.99 TIWI_BT_EN
30 J10.45 TIWI_EN
12, 14, 16, 18, 20, 22 - N.C. Not connected

Device mapping[edit | edit source]

The WiFi peripheral is mapped to the corresponding wlan<X> device in Linux. The network peripheral is visible under the ifconfig network configuration utility.

Device usage[edit | edit source]

The peripheral is used the standard kernel interface and network protocol stack.



GPIOs[edit | edit source]

Description[edit | edit source]

i.MX6 can handle external pins in many different ways and most of them can be configured as GPIOs. When a pin is set as a GPIO, it is possible to read its value, change its direction or change output value directly from the shell.

Signals[edit | edit source]

The following table describes some GPIOs signals available on J33 WIDE™ connector:

Pin# SOM Pin# Pin name Pin function Pin Notes
28 J10.191 EIM_D26 GPIO3_IO26
30 J10.193 EIM_D27 GPIO3_IO27
32 J10.50 GPIO_17 GPIO7_IO12
34 J10.40 GPIO_6/I2C3_SDA GPIO1_IO06

Device mapping[edit | edit source]

GPIOs can be used directly on Linux kernel device driver or can be configured on the device tree.

Device usage[edit | edit source]

See the GPIOs page on the DESK-MX6-L Software Manual.


Electrical and Mechanical Documents[edit | edit source]

Please find here below the links for the AXEL Lite Evaluation Kit schematics and the related documents (BOM and layout):

Schematics[edit | edit source]

BOM[edit | edit source]

Layout[edit | edit source]




17046

Mechanical specifications[edit | edit source]

This page describes the mechanical characteristics of the SBCX board.

Board layout[edit | edit source]

Assembly view: top
Assembly view: bottom

Dimensions[edit | edit source]

AXEL Lite-EVK-dimensions.png

CAD drawings[edit | edit source]

3D drawings[edit | edit source]

Mechanical data[edit | edit source]

Dimension Value
Width 156 mm
Depth 84 mm
Max component's height (top) 13.87 mm
Max component's height (bottom)
PCB height 1.69 mm