AXEL Lite SOM/AXEL Lite Hardware/Power and Reset/Power Supply Unit (PSU) and recommended power-up sequence

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Issue Date Notes
2020/10/26 New documentation layout

Power Supply Unit (PSU) and recommended power-up sequence[edit | edit source]

Implementing correct power-up sequence for i.MX6 processors is not a trivial task because several power rails are involved.

AXEL Lite SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry:

Power sequence

The PSU is composed of two main blocks:

  • power management integrated circuit
  • additional generic power management circuitry that completes PMIC functionalities

The PSU:

  • generates the proper power-up sequence required by the SOC processor and surrounding memories and peripherals
  • synchronizes the powering up of carrier board in order to prevent back power
  • provides some spare regulated voltages that can be used to power carrier board devices

Power-up sequence[edit | edit source]

The typical power-up sequence is the following:

  1. (optional) PMIC_LICELL is powered
  2. 3.3VIN main power supply rail is powered
  3. CPU_PORn (active-low) is driven low
  4. PMIC activates PMIC_VSNVS power output
  5. PMIC_PWRON signal is pulled-up (unless carrier board circuitry keeps this signal low for any reason)
  6. PMIC transitions from OFF to ON state
  7. PMIC initiates power-up sequence needed by MX6 processor
  8. BOARD_PGOOD signal is raised; this active-high signal indicates that SoM's I/O is powered. This signal can be used to manage carrier board power up sequence in order to prevent back powering (from SoM to carrier board or vice versa). For additional information, please refer to the Note below.
  9. CPU_PORn is released

Note on BOARD_PGOOD usage[edit | edit source]

BOARD_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals.

Depending on the kind of such loads, BOARD_PGOOD might not be able to drive them properly. In these cases a simple 2-input AND port can be used to address this issue. The following picture depicts a principle schematic showing this solution.

VDD_SOM denotes the power rail used to power AXEL Lite SoM.

Power good

Real-time clock (RTC) powering[edit | edit source]

Real-time clock is integrated in iMX6 processor. As such, it belongs to SNVS power domain. This domain, in turn, is powered by PMIC, via PMIC_VSNSV rail (see also this page). PMIC integrates a sort of switch. When 3V3VIN voltage is applied, this is used to power SNVS domain. Otherwise energy is drawn from coin cell battery - if any - connected to PMIC_LICELL (for more details please refer to [1]).

Simplified block diagram of Axel Lite RTC powering scheme

It is worth remembering that 3.0V lithium batteries are supported and that PMIC_VSNSV voltage range is 2.4 - 3.6V. When Axel Lite enters RTC mode and 3V3VIN voltage is removed, typical current absorption from PMIC_LICELL pin is about 135uA. This value is relatively high with respect to the typical lithium coin cell battery capacity (10 - 50mAh). It is recommended that system integrator verify that expected battery lifetime satisfies system requirement. If not, the use of an external low-power RTC device should be considered.

  1. NXP, MMPF0100 - PF0100 Data sheet: Advance Information