AURA SOM/AURA Hardware/Peripherals/FlexIO

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History
Issue Date Notes
2023/09/13 First release



Peripheral FlexIO[edit | edit source]

FLEXIO uses shifters, timers, and external triggers to shift data into or out of the FLEXIO. It is a a highly configurable module providing a wide range of functionality, including:

  • Emulation of various serial or parallel communication protocols
  • Flexible 16-bit timers with support for various trigger, reset, enable, and disable conditions

The FlexIO module available on AURA is based on i.MX93 SoC. The Flexible I/O (FLEXIO) is a highly configurable module providing a wide range of functionality.

Description[edit | edit source]

The FlexIO module supports the following features:

  • Array of 32-bit shift registers with transmit, receive, data match, logic, and state modes
    • Double-buffered shifter operation for continuous data transfer
    • Shifter concatenation to support large transfer sizes
  • Automatic start and stop bit generation
  • 1, 2, 4, 8, 16, or 32 multi-bit shift widths for parallel interface support
  • Interrupt, DMA, or polled transmit and receive operation
  • Programmable baud rates independent of bus clock frequency
  • Highly flexible 16-bit timers with support for various internal or external trigger, reset, enable, and disable conditions
  • Programmable logic mode
  • Programmable state machine for offloading basic system control functions from CPU
  • Integrated general-purpose input/output registers and pin rising or falling edge interrupts
  • Support for a wide range of protocols, including but not limited to:
    • UART, I2C, SPI, I2S, Camera IF, Motorola 68K or Intel 8080 bus, PWM or waveform generation

Pin mapping[edit | edit source]

The Pin mapping is described in the Pinout table section