AURA SOM/AURA Hardware/Peripherals/Ethernet
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| 2023/09/13 | First release | ||
Peripheral Ethernet[edit | edit source]
AURA SOM is based on i.MX93 SoC which includes two 10/100/1000Mbps Ethernet interfaces.
- 1G-bit Ethernet QoS with TSN support
- 1G-bit Ethernet with AVB support
Description[edit | edit source]
The first Ethernet port has a EQoS-TSN module and supports the following standards and features:
- compliance with IEEE802.3-2015 specifications. It can support advanced applications such as Time-Sensitive Networking (TSN) and Audio Video Bridge (AVB)
- Time aware shaper (IEEE802.1Qbv), Time synchronization (IEEE1588-2008), and Frame pre-emption (IEEE802.1Qbu) for Time-Sensitive Networking (TSN)
- Media clock recovery and generation for AVB
- RMII specification version 1.2
- RGMII specification version 2.6
- Flexibility to control the Pulse per second (PPS) output signal
- VLAN insertion, replacement and deletion in transmitted packets with per-packet or static-global control
- Insertion, replacement and deletion of up to two VLAN tags
- Insertion, replacement and deletion of queue/channel based VLAN tags
- IEEE802.1Q VLAN tag detection and option to delete from received packets
- Flexible address filtering modes
- Additional packet filtering
The second Ethernet port supports the following standards and features:
- compliance with the IEEE802.3-2002 standard (full 802.3 specification with preamble/SFD generation, frame padding generation, CRC generation and checking)
- Dynamically configurable to support 10/100-Mbit/s and gigabit operation
- 10/100 Mbit/s full-duplex and configurable half-duplex operation and gigabit full-duplex operation
- VLAN-tagged frames according to IEEE 802.1Q
- AVB (Audio Video Bridging, IEEE 802.1Qav)
- credit-based bandwidth distribution policy can be combined with time-based shaping
- AVB endpoint talker and listener support
- arbitration between different priority traffic (for example, AVB class A, AVB class B, and non-AVB)
- all IEEE 1588 frames with 4-channel IEEE 1588 timer (each channel supports input capture and output compare using the 1588 counter)
Pin mapping[edit | edit source]
The Pin mapping is described in the Pinout table section
