Open main menu

DAVE Developer's Wiki β

Reset scheme (Naon)

Revision as of 12:57, 2 May 2012 by DevWikiAdmin (talk | contribs) (PORSTn (J2.109))

Info Box
Naon am387x-dm814x.png Applies to Naon

Five different signals are provided by Naon SOM. FOllowing sections describes in more detail each one.

Contents

MRST (J2.102)Edit

This pin is connected to HDRST signal (cold reset) of PMIC TPS659113. When high, this signals keeps PMIC in off mode and resets TPS659113 to default settings. MRST has a weak internal pulldown.

PORSTn (J2.109)Edit

PORSTn is a bidirectional open-drain signal. It is connected to:

RSTOUTn (J2.91)Edit

CPU_RESETn (J2.15)Edit

JTAG_TRSTn (J2.100)Edit