Power consumption (BoraLite)

Info Box Applies to BORA Lite

IntroductionEdit

Providing maximum power consumption of a system-on-module (SOM for short) is virtually impossible because it is extremely hard to define the worst case. This is even more true in case of BORA Lite, where this is affected by the software running on Processing System (PS) side and the Programmable Logic (PL) configuration.

For this reason, several real use cases have been considered rather than indicating a theoretical maximum power consumption value that would be useless for the majority of system integrators, because it likely would lead to an oversized power supply unit.

Again, it is worth remembering that BORA Lite platform is so flexible that is practically impossible to test for all possible configurations and applications on the market. The use cases here presented should cover most of the real-world scenarios. However, actual customer application might require more power than values reported here. Generally speaking, application-specific requirements have to be taken into consideration in order to size the power supply unit and to implement thermal management properly.

The following sections describe in detail the testbeds that have been used. All of them make use of a specific FPGA bistream that has been developed to perform stress tests on BORA Lite platforms [1]. These tests have been conducted in a climatic chamber that allows setting environment temperature surrounding DUT, denoted in the rest of the document as Tamb. Tj denotes Zynq's junction temperature instead.

FPGA bitstream - that in turn is built upon this core - allocates most of FPGA resources. All of them are clocked by one clock signal whose frequency is selectable by the PS at runtime. This allows to flexibly change DUT current absorption and, consequently, the heat it generates.