PL initialization signals (Bora/BoraX/BoraLite)
Revision as of 14:10, 14 December 2020 by U0007 (talk | contribs) (Created page with "{{InfoBoxTop}} {{Applies To Bora}} {{Applies To BoraX}} {{Applies To BoraLite}} {{InfoBoxBottom}} = Introduction = This page provides the information about the PL initializa...")
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Introduction[edit | edit source]
This page provides the information about the PL initialization signals: PROGRAM_B, INIT_B, DONE
PL Logic[edit | edit source]
Please refer to Zynq Technical Reference Manual UG-585 for more information about usage and configuration of initialization circuit and signals.
As written in UG-585 the Table 6-24: PL Initialization Signals, the user can initialize the PL using the signals.
BORA, BORAX and BORALite SOM are configured in the following way:
- PROGRAM_B has an internal 10Kohm pull-up as indicated on Xilinx AR#56272
- INIT_B is directly connected to SOM connector
- DONE does not require and external pull-up or pull-down but can be used for connecting a user led for a configuration completed indication (see for example BoraXEVB schematics)
External pull-ups[edit | edit source]
- PROGRAM_B: for as stronger pull-up, as indicated in the UG-585, it is possible to pull-up it using a 3V3 controlled power domain
- INIT_B: for using this signal as PL initializing signal Low-to-High transition, place an external pull-up to a 3V3 controlled power domain
3V3 on Carrier board[edit | edit source]
Attention: the 3V3 Carrier power domain, has to be driven and controlled via BOARD_PGOOD signal as indicated on Power page
A controlled switch can be placed in the Carrier board following the schematics example here below:
File:BORA BOARD PGOOD 3V3.png
3V3 controlled via BOARD_PGOOD
