Difference between revisions of "ORCA SOM/ORCA Hardware/Peripherals/SPI"

From DAVE Developer's Wiki
Jump to: navigation, search
Line 14: Line 14:
 
|}
 
|}
 
<section end="History" />
 
<section end="History" />
<section begin="Preliminary" />
 
  
 
==Peripheral SPI ==
 
==Peripheral SPI ==
 
{{Wip|text=Documentation under NXP's NDA: please refer to helpdesk@dave.eu }}
 
 
<section end="Preliminary" />
 
 
<!--
 
  
 
<section begin="Body" />
 
<section begin="Body" />
Line 45: Line 38:
  
 
The Pin mapping is described in the [[ORCA SOM/ORCA Hardware/Pinout_Table | Pinout table section]]
 
The Pin mapping is described in the [[ORCA SOM/ORCA Hardware/Pinout_Table | Pinout table section]]
 
-->
 
  
 
----
 
----
  
 
[[Category:ORCA]]
 
[[Category:ORCA]]

Revision as of 15:25, 13 December 2021

History
Version Issue Date Notes
1.0.0 Feb 2021 First release


Peripheral SPI[edit | edit source]


The Enhanced Configurable Serial Peripheral Interface (ECSPI) is a full-duplex, synchronous, four-wire serial communication block.

Description[edit | edit source]

Three SPI interface are available on ORCA based on iMX8MPlus SoC.

The SPI port supports the following standards and features:

  • Full-duplex synchronous serial interface
  • Master/Slave configurable
  • One Chip Select (SS) signal
  • Transfer continuation function allows unlimited length data transfers
  • 32-bit wide by 64-entry FIFO for both transmit and receive data
  • Polarity and phase of the Chip Select (SS) and SPI Clock (SCLK) are configurable
  • Direct Memory Access (DMA) support

Pin mapping[edit | edit source]

The Pin mapping is described in the Pinout table section