ORCA SOM/ORCA Hardware/Pinout Table

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History
Version Issue Date Notes
1.0.0 Jan 2021 First release

Connectors and Pinout Table[edit | edit source]

Connectors description[edit | edit source]

In the following table are described all available connectors integrated on ORCA SOM:

Connector name Connector Type Notes Carrier board counterpart
J1 SODIMM DDR4 edge connector 260 pin TE Connectivity 2309407-1

The dedicated carrier board must mount the mating connector and connect the desired peripheral interfaces according to ORCA pinout specifications. See the images below for reference:

ORCA TOP view
ORCA BOTTOM view

Pinout table naming conventions[edit | edit source]

This chapter contains the pinout description of the ORCA module, grouped in two tables (odd and even pins) that report the pin mapping of the 260-pin DDR4 SO-DIMM ORCA connector.

Each row in the pinout tables contains the following information:

Pin Reference to the connector pin
Pin Name Pin (signal) name on the ORCA connectors
Internal
connections
Connections to the ORCA components
  • CPU.<x> : pin connected to CPU pad named <x>
  • PMIC.<x> : pin connected to the Power Manager IC PCA9450
  • LAN.<x> : pin connected to the LAN PHY KSZ9131
  • eMMC.<x>: pin connected to the flash eMMC
  • NOR.<x>: pin connected to the flash NOR
  • NAND.<x>: pin connected to the flash NAND
  • MTR: pin connected to voltage monitors
  • SE: pin connected to Secure Element unit SE050
Ball/pin # Component ball/pin number connected to signal
Voltage I/O voltage levels
Type Pin type:
  • I = Input
  • O = Output
  • D = Differential
  • Z = High impedance
  • S = Power supply voltage
  • G = Ground
  • A = Analog signal
Notes Remarks on special pin characteristics
Pin MUX alternative functions Muxes:
  • Pin ALT-0
  • ...
  • Pin ALT-N

The number of functions depends on platform

Pinout Table ODD pins declaration[edit | edit source]

Pin Pin Name Internal Connections Ball/pin # Voltage domain Type Notes Alternative Functions
J1.1 DGND DGND - - G
J1.3 VIN_SOM INPUT VOLTAGE - 3.3VIN S
J1.5 VIN_SOM INPUT VOLTAGE - 3.3VIN S
J1.7 VIN_SOM INPUT VOLTAGE - 3.3VIN S
J1.9 VIN_SOM INPUT VOLTAGE - 3.3VIN S
J1.11 VIN_SOM INPUT VOLTAGE - 3.3VIN S
J1.13 VIN_SOM INPUT VOLTAGE - 3.3VIN S
J1.15 CPU_ONOFF CPU.ONOFF G22 NVCC_SNVS_1V8 I/O internal pull-up 100k to NVCC_SNVS_1V8
J1.17 CPU_PORn CPU.POR_B

PMIC.POR_B

J29

9

NVCC_SNVS_1V8 I/O internal pull-up 100k to NVCC_SNVS_1V8
J1.19 PMIC_ON_REQ

//VMON_RST

CPU.PMIC_ON_REQ

PMIC.PMIC_ON_REQ

F22

39

NVCC_SNVS_1V8 I/O optionally connected to

voltage monitor reset

J1.21 PMIC_RST_B PMIC.PMIC_RST_B 8 NVCC_SNVS_1V8 I/O internal pull-up 100k to NVCC_SNVS_1V8
J1.23 BOARD_PGOOD MTR.RESET_B 2 NVCC_3V3 O
J1.25 BOOT_MODE0 CPU.BOOT_MODE0 G10 NVCC_3V3 I internal 10k pull-up or pull-down

according to specific model

J1.27 BOOT_MODE1 CPU.BOOT_MODE1 F8 NVCC_3V3 I internal 10k pull-up or pull-down

according to specific model

J1.29 BOOT_MODE2 CPU.BOOT_MODE2 G8 NVCC_3V3 I internal 10k pull-up or pull-down

according to specific model

J1.31 DGND DGND - - G
J1.33 LVDS0_D3_N CPU.LVDS0_D3_N J28 - D
J1.35 LVDS0_D3_P CPU.LVDS0_D3_P H29 - D
J1.37 LVDS0_D2_N CPU.LVDS0_D2_N H28 - D
J1.39 LVDS0_D2_P CPU.LVDS0_D2_P G29 - D
J1.41 LVDS0_CLK_N CPU.LVDS0_CLK_N G28 - D
J1.43 LVDS0_CLK_P CPU.LVDS0_CLK_P F29 - D
J1.45 LVDS0_D1_N CPU.LVDS0_D1_N F28 - D
J1.47 LVDS0_D1_P CPU.LVDS0_D1_P E29 - D
J1.49 LVDS0_D0_N CPU.LVDS0_D0_N E28 - D
J1.51 LVDS0_D0_P CPU.LVDS0_D0_P D29 - D
J1.53 DGND DGND - - G
J1.55 LVDS1_D3_N CPU.LVDS1_D3_N D28 - D
J1.57 LVDS1_D3_P CPU.LVDS1_D3_P C29 - D
J1.59 LVDS1_D2_N CPU.LVDS1_D2_N C28 - D
J1.61 LVDS1_D2_P CPU.LVDS1_D2_P B29 - D
J1.63 LVDS1_CLK_N CPU.LVDS1_CLK_N B28 - D
J1.65 LVDS1_CLK_P CPU.LVDS1_CLK_P A28 - D
J1.67 LVDS1_D1_N CPU.LVDS1_D1_N B27 - D
J1.69 LVDS1_D1_P CPU.LVDS1_D1_P A27 - D
J1.71 LVDS1_D0_N CPU.LVDS1_D0_N B26 - D
J1.73 LVDS1_D0_P CPU.LVDS1_D0_P A26 - D
J1.75 DGND DGND - - G
J1.77 MIPI_CSI2_D0_P CPU.MIPI_CSI2_D0_P A25 - D
J1.79 MIPI_CSI2_D0_N CPU.MIPI_CSI2_D0_N B25 - D
J1.81 MIPI_CSI2_D1_P CPU.MIPI_CSI2_D1_P A24 - D
J1.83 MIPI_CSI2_D1_N CPU.MIPI_CSI2_D1_N B24 - D
J1.85 MIPI_CSI2_CLK_P CPU.MIPI_CSI2_CLK_P A23 - D
J1.87 MIPI_CSI2_CLK_N CPU.MIPI_CSI2_CLK_N B23 - D
J1.89 MIPI_CSI2_D2_P CPU.MIPI_CSI2_D2_P A22 - D
J1.91 MIPI_CSI2_D2_N CPU.MIPI_CSI2_D2_N B22 - D
J1.93 MIPI_CSI2_D3_P CPU.MIPI_CSI2_D3_P A21 - D
J1.95 MIPI_CSI2_D3_N CPU.MIPI_CSI2_D3_N B21 - D
J1.97 DGND DGND - - G
J1.99 MIPI_CSI1_D3_P CPU.MIPI_CSI1_D3_P D26 - D
J1.101 MIPI_CSI1_D3_N CPU.MIPI_CSI1_D3_N E26 - D
J1.103 MIPI_CSI1_D2_P CPU.MIPI_CSI1_D2_P D24 - D
J1.105 MIPI_CSI1_D2_N CPU.MIPI_CSI1_D2_N E24 - D
J1.107 MIPI_CSI1_CLK_P CPU.MIPI_CSI1_CLK_P D22 - D
J1.109 MIPI_CSI1_CLK_N CPU.MIPI_CSI1_CLK_N E22 - D
J1.111 MIPI_CSI1_D1_P CPU.MIPI_CSI1_D1_P D20 - D
J1.113 MIPI_CSI1_D1_N CPU.MIPI_CSI1_D1_N E20 - D
J1.115 MIPI_CSI1_D0_P CPU.MIPI_CSI1_D0_P D18 - D
J1.117 MIPI_CSI1_D0_N CPU.MIPI_CSI1_D0_N E18 - D
J1.119 DGND DGND - - G
J1.121 MIPI_DSI1_D3_P CPU.MIPI_DSI1_D3_P A20 - D
J1.123 MIPI_DSI1_D3_N CPU.MIPI_DSI1_D3_N B20 - D
J1.125 MIPI_DSI1_D2_P CPU.MIPI_DSI1_D2_P A19 - D
J1.127 MIPI_DSI1_D2_N CPU.MIPI_DSI1_D2_N B19 - D
J1.129 MIPI_DSI1_CLK_P CPU.MIPI_DSI1_CLK_P A18 - D
J1.131 MIPI_DSI1_CLK_N CPU.MIPI_DSI1_CLK_N B18 - D
J1.133 MIPI_DSI1_D1_P CPU.MIPI_DSI1_D1_P A17 - D
J1.135 MIPI_DSI1_D1_N CPU.MIPI_DSI1_D1_N B17 - D
J1.137 MIPI_DSI1_D0_P CPU.MIPI_DSI1_D0_P A16 - D
J1.139 MIPI_DSI1_D0_N CPU.MIPI_DSI1_D0_N B16 - D
J1.141 DGND DGND - - G
J1.143 JTAG_MOD CPU.JTAG_MOD G20 NVCC_3V3 I/O
J1.145 JTAG_TCK CPU.JTAG_TCK G18 NVCC_3V3 I/O
J1.147 JTAG_TDI CPU.JTAG_TDI G16 NVCC_3V3 I
J1.149 JTAG_TMS CPU.JTAG_TMS G14 NVCC_3V3 I/O
J1.151 JTAG_TDO CPU.JTAG_TDO F14 NVCC_3V3 O
J1.153 DGND DGND - - G
J1.155 PCIE_REF_PAD_CLK_P CPU.PCIE_REF_PAD_CLK_P D16 - D
J1.157 PCIE_REF_PAD_CLK_N CPU.PCIE_REF_PAD_CLK_N E16 - D
J1.159 PCIE_TXN_P CPU.PCIE_TXN_P A15 - D
J1.161 PCIE_TXN_N CPU.PCIE_TXN_N B15 - D
J1.163 PCIE_RXN_P CPU.PCIE_RXN_P A14 - D
J1.165 PCIE_RXN_N CPU.PCIE_RXN_N B14 - D
J1.167 DGND DGND - - G
J1.169 USB2_VBUS USB2_VBUS - - S See USB section for details (5-20V tolerance)
J1.171 DNU DNU - - - DNU stands for Do Not Use.

This pin must be left unconnected/floating.

J1.173 USB2_D_P CPU.USB2_D_P D14 - D
J1.175 USB2_D_N CPU.USB2_D_N E14 - D
J1.177 DGND DGND - - G
J1.179 USB2_TX_P CPU.USB2_TX_P A13 - D
J1.181 USB2_TX_N CPU.USB2_TX_N B13 - D
J1.183 USB2_RX_P CPU.USB2_RX_P A12 - D
J1.185 USB2_RX_N CPU.USB2_RX_N B12 - D
J1.187 DGND DGND - - G
J1.189 USB1_VBUS USB1_VBUS - - S See USB section for details (5-20V tolerance)
J1.191 ETH0_INTn LAN.INT_N/PME_N2 38 VDD_1V8 O Must be level translated if used @ 3V3

Internally pulled-up to 1.8V

J1.193 USB1_D_P CPU.USB1_D_P D10 - D
J1.195 USB1_D_N CPU.USB1_D_N E10 - D
J1.197 DGND DGND - - G
J1.199 USB1_TX_P CPU.USB1_TX_P A10 - D
J1.201 USB1_TX_N CPU.USB1_TX_N B10 - D
J1.203 USB1_RX_P CPU.USB1_RX_P A9 - D
J1.205 USB1_RX_N CPU.USB1_RX_N B9 - D
J1.207 DGND DGND - - G
J1.209 GPIO1_IO08 CPU.GPIO1_IO08 A8 NVCC_3V3 I/O Pin ALT-0 GPIO1_IO08
Pin ALT-1 ENET_QOS_1588_EVENT0_IN
Pin ALT-2 PWM1_OUT
Pin ALT-3 ISP_PRELIGHT_TRIG_1
Pin ALT-4 ENET_QOS_1588_EVENT0_AUX_IN
Pin ALT-5 USDHC2_RESET_B
J1.211 GPIO1_IO11 CPU.GPIO1_IO11 D8 NVCC_3V3 I/O Pin ALT-0 GPIO1_IO11
Pin ALT-1 USB2_OTG_ID
Pin ALT-2 PWM2_OUT
Pin ALT-4 USDHC3_VSELECT
Pin ALT-5 CCM_PMIC_READY
J1.213 GPIO1_IO09 CPU.GPIO1_IO09 B8 NVCC_3V3 I/O Pin ALT-0 GPIO1_IO09
Pin ALT-1 ENET_QOS_1588_EVENT0_OUT
Pin ALT-2 PWM2_OUT
Pin ALT-3 ISP_SHUTTER_OPEN_1
Pin ALT-4 USDHC3_RESET_B
Pin ALT-5 SDMA2_EXT_EVENT00
J1.215 GPIO1_IO00 CPU.GPIO1_IO00 A7 NVCC_3V3 I/O Pin ALT-0 GPIO1_IO00
Pin ALT-1 CCM_ENET_PHY_REF_CLK_ROOT
Pin ALT-3 ISP_FL_TRIG_0
Pin ALT-6 CCM_EXT_CLK1
J1.217 GPIO1_IO01 CPU.GPIO1_IO01 E8 NVCC_3V3 I/O Pin ALT-0 GPIO1_IO01
Pin ALT-1 PWM1_OUT
Pin ALT-3 ISP_SHUTTER_TRIG_0
Pin ALT-6 CCM_EXT_CLK2
J1.219 GPIO1_IO10 CPU.GPIO1_IO10 B7 NVCC_3V3 I/O Pin ALT-0 GPIO1_IO10
Pin ALT-1 USB1_OTG_ID
Pin ALT-2 PWM3_OUT
J1.221 GPIO1_IO13 CPU.GPIO1_IO13 A6 NVCC_3V3 I/O Pin ALT-0 GPIO1_IO13
Pin ALT-1 TUSB1_OTG_OCBD
Pin ALT-5 PWM2_OUT
J1.223 GPIO1_IO12 CPU.GPIO1_IO12 A5 NVCC_3V3 I/O Pin ALT-0 GPIO1_IO12
Pin ALT-1 USB1_OTG_PWR
Pin ALT-5 SDMA2_EXT_EVENT01
J1.225 GPIO1_IO07 CPU.GPIO1_IO07 F6 NVCC_3V3 I/O Pin ALT-0 GPIO1_IO07
Pin ALT-1 ENET_QOS_MDIO
Pin ALT-3 ISP_FLASH_TRIG_1
Pin ALT-5 USDHC1_WP
Pin ALT-6 CCM_EXT_CLK4
J1.227 GPIO1_IO15 CPU.GPIO1_IO15 B5 NVCC_3V3 I/O Pin ALT-0 GPIO1_IO15
Pin ALT-1 USB2_OTG_OC
Pin ALT-4 USDHC3_WP
Pin ALT-5 PWM4_OUT
Pin ALT-6 CCM_CLKO2
J1.229 GPIO1_IO14 CPU.GPIO1_IO14 A4 NVCC_3V3 I/O Pin ALT-0 GPIO1_IO14
Pin ALT-1 USB2_OTG_PWR
Pin ALT-4 USDHC3_CD_B
Pin ALT-5 PWM3_OUT
Pin ALT-6 CCM_CLKO1
J1.231 GPIO1_IO05 CPU.GPIO1_IO05 B4 NVCC_3V3 I/O Pin ALT-0 GPIO1_IO05
Pin ALT-1 M7_NMI
Pin ALT-3 ISP_FL_TRIG_1
Pin ALT-6 CCM_PMIC_READY
J1.233 GPIO1_IO06 CPU.GPIO1_IO06 A3 NVCC_3V3 I/O Pin ALT-0 GPIO1_IO06
Pin ALT-1 ENET_QOS_MDC
Pin ALT-3 ISP_SHUTTER_TRIG_1
Pin ALT-5 USDHC1_CD_B
Pin ALT-6 CCM_EXT_CLK3
J1.235 DGND DGND - - G
J1.237 ETH0_TXRX3_M LAN.TXTRM_D 11 - D
J1.239 ETH0_TXRX3_P LAN.TXTRP_D 10 - D
J1.241 ETH0_TXRX2_M LAN.TXTRM_C 8 - D
J1.243 ETH0_TXRX2_P LAN.TXTRP_C 7 - D
J1.245 ETH0_TXRX1_M LAN.TXTRM_B 6 - D
J1.247 ETH0_TXRX1_P LAN.TXTRP_B 5 - D
J1.249 ETH0_TXRX0_M LAN.TXTRM_A 3 - D
J1.251 ETH0_TXRX0_P LAN.TXTRP_A 2 - D
J1.253 DGND DGND - - G
J1.255 ETH0_LED1 LAN.LED2 15 VDD_1V8 O Must be level translated if used @ 3V3

Internally pulled-up to 1.8V during bootstrap

J1.257 ETH0_LED2 LAN.LED1/PME_N1 17 VDD_1V8 O Must be level translated if used @ 3V3

Internally pulled-up to 1.8V during bootstrap

J1.259 DGND DGND - - G

Pinout Table EVEN pins declaration[edit | edit source]

Pin Pin Name Internal Connections Ball/pin # Voltage domain Type Notes Alternative Functions
J1.2 DGND DGND - - G
J1.4 VIN_SOM INPUT VOLTAGE - 3.3VIN S
J1.6 VIN_SOM INPUT VOLTAGE - 3.3VIN S
J1.8 VIN_SOM INPUT VOLTAGE - 3.3VIN S
J1.10 VIN_SOM INPUT VOLTAGE - 3.3VIN S
J1.12 VIN_SOM INPUT VOLTAGE - 3.3VIN S
J1.14 DGND DGND - - G
J1.16 SD1_CLK CPU.SD1_CLK W28 NVCC_3V3 I/O Pin ALT-0 USDHC1_CLK
Pin ALT-1 ENET1_MDC
Pin ALT-3 I2C5_SCL
Pin ALT-4 UART1_TX
Pin ALT-5 GPIO2_IO[0]
J1.18 SD1_CMD CPU.SD1_CMD W29 NVCC_3V3 I/O Pin ALT-0 USDHC1_CMD
Pin ALT-1 ENET1_MDIO
Pin ALT-3 I2C5_SDA
Pin ALT-4 UART1_RX
Pin ALT-5 GPIO2_IO[1]
J1.20 SD1_DATA0 CPU.SD1_DATA0 Y29 NVCC_3V3 I/O Pin ALT-0 USDHC1_DATA0
Pin ALT-1 ENET1_RGMII_TD1
Pin ALT-3 I2C6_SCL
Pin ALT-4 UART1_RTS_B
Pin ALT-5 GPIO2_IO[2]
J1.22 SD1_DATA1 CPU.SD1_DATA1 Y28 NVCC_3V3 I/O Pin ALT-0 USDHC1_DATA1
Pin ALT-1 ENET1_RGMII_TD0
Pin ALT-3 I2C6_SDA
Pin ALT-4 UART1_CTS_B
Pin ALT-5 GPIO2_IO[3]
J1.24 SD1_DATA2 CPU.SD1_DATA2 V29 NVCC_3V3 I/O Pin ALT-0 USDHC1_DATA2
Pin ALT-1 ENET1_RGMII_RD0
Pin ALT-3 I2C4_SCL
Pin ALT-4 UART2_TX
Pin ALT-5 GPIO2_IO[4]
J1.26 SD1_DATA3 CPU.SD1_DATA3 V28 NVCC_3V3 I/O Pin ALT-0 USDHC1_DATA3
Pin ALT-1 ENET1_RGMII_RD1
Pin ALT-3 I2C4_SDA
Pin ALT-4 UART2_RX
Pin ALT-5 GPIO2_IO[5]
J1.28 SD1_DATA4 CPU.SD1_DATA4 U26 NVCC_3V3 I/O Pin ALT-0 USDHC1_DATA4
Pin ALT-1 ENET1_RGMII_TX_CTL
Pin ALT-3 I2C1_SCL
Pin ALT-4 UART2_RTS_B
Pin ALT-5 GPIO2_IO[6]
J1.30 SD1_DATA5 CPU.SD1_DATA5 AA29 NVCC_3V3 I/O Pin ALT-0 USDHC1_DATA5
Pin ALT-1 ENET1_TX_ER
Pin ALT-3 I2C1_SDA
Pin ALT-4 UART2_CTS_B
Pin ALT-5 GPIO2_IO[7]
J1.32 SD1_DATA6 CPU.SD1_DATA6 AA28 NVCC_3V3 I/O Pin ALT-0 USDHC1_DATA6
Pin ALT-1 FLEXSPI_B_DATA[2]
Pin ALT-2 USDHC3_DATA2
Pin ALT-3 FLEXSPI_A_DATA[6]
Pin ALT-4 ISP_PRELIGHT_TRIG_1
Pin ALT-5 GPIO3_IO[12]
J1.34 SD1_DATA7 CPU.SD1_DATA7 U25 NVCC_3V3 I/O Pin ALT-0 USDHC1_DATA7
Pin ALT-1 ENET1_RX_ER
Pin ALT-3 I2C2_SDA
Pin ALT-4 UART3_RX
Pin ALT-5 GPIO2_IO[9]
J1.36 SD1_RESET_B CPU.SD1_RESET_B W25 NVCC_3V3 I/O Pin ALT-0 USDHC1_RESET_B
Pin ALT-1 ENET1_TX_CLK
Pin ALT-3 I2C3_SCL
Pin ALT-4 UART3_RTS_B
Pin ALT-5 GPIO2_IO[10]
J1.38 SD1_STROBE CPU.SD1_STROBE W26 NVCC_3V3 I/O Pin ALT-0 USDHC1_STROBE
Pin ALT-3 I2C3_SDA
Pin ALT-4 UART3_CTS_B
Pin ALT-5 GPIO2_IO[11]
J1.40 DGND DGND - - G
J1.42 SD2_CD_B CPU.SD2_CD_B AD29 NVCC_3V3 I/O Pin ALT-0 USDHC2_CD_B
Pin ALT-5 GPIO2_IO[12]
J1.44 SD2_CLK CPU.SD2_CLK AB29 NVCC_3V3 I/O Pin ALT-0 USDHC2_CLK
Pin ALT-2 ECSPI2_SCLK
Pin ALT-3 UART4_RX
Pin ALT-5 GPIO2_IO[13]
J1.46 SD2_CMD CPU.SD2_CMD AB28 NVCC_3V3 I/O Pin ALT-0 USDHC2_CMD
Pin ALT-2 ECSPI2_MOSI
Pin ALT-3 UART4_TX
Pin ALT-4 AUDIOMIX_CLK
Pin ALT-5 GPIO2_IO[14]
J1.48 SD2_DATA0 CPU.SD2_DATA0 AC28 NVCC_3V3 I/O Pin ALT-0 USDHC2_DATA0
Pin ALT-2 I2C4_SDA
Pin ALT-3 UART2_RX
Pin ALT-4 AUDIOMIX_BIT_STREAM[0]
Pin ALT-5 GPIO2_IO[15]
J1.50 SD2_DATA1 CPU.SD2_DATA1 AC29 NVCC_3V3 I/O Pin ALT-0 USDHC2_DATA1
Pin ALT-2 I2C4_SCL
Pin ALT-3 UART2_TX
Pin ALT-4 AUDIOMIX_BIT_STREAM[1]
Pin ALT-5 GPIO2_IO[16]
J1.52 SD2_DATA2 CPU.SD2_DATA2 AA26 NVCC_3V3 I/O Pin ALT-0 USDHC2_DATA2
Pin ALT-2 ECSPI2_SS0
Pin ALT-3 AUDIOMIX_SPDIF_OUT
Pin ALT-4 AUDIOMIX_BIT_STREAM[2]
Pin ALT-5 GPIO2_IO[17]
J1.54 SD2_DATA3 CPU.SD2_DATA3 AA25 NVCC_3V3 I/O Pin ALT-0 USDHC2_DATA3
Pin ALT-2 ECSPI2_MISO
Pin ALT-3 AUDIOMIX_SPDIF_IN
Pin ALT-4 AUDIOMIX_BIT_STREAM[3]
Pin ALT-5 GPIO2_IO[18]
Pin ALT-6 SRC_EARLY_RESET
J1.56 SD2_RESET_B CPU.SD2_RESET_B AD28 NVCC_3V3 I/O Pin ALT-0 USDHC2_RESET_B
Pin ALT-5 GPIO2_IO[19]
Pin ALT-6 SRC_SYSTEM_RESET
J1.58 SD2_WP CPU.SD2_WP AC26 NVCC_3V3 I/O Pin ALT-0 USDHC2_WP
Pin ALT-5 GPIO2_IO[20]
Pin ALT-6 CORESIGHT_EVENTI
J1.58

(both NAND and

NOR on board)

SD2_WP CPU.SD2_WP AC26 NVCC_3V3 O internal use for

NAND/NOR selection,

do not connect

J1.60 DGND DGND - - G
J1.62 CLKIN1 CPU.CLKIN1 K28 NVCC_3V3 I
J1.64 CLKIN2 CPU.CLKIN2 L28 NVCC_3V3 I
J1.66 DGND DGND - - G
J1.68 CLKOUT1 CPU.CLKOUT1 K29 NVCC_3V3 O
J1.70 CLKOUT2 CPU.CLKOUT2 L29 NVCC_3V3 O
J1.72 DGND DGND - - G
J1.74 HDMI_CEC CPU.HDMI_CEC AD22 NVCC_3V3 I/O Pin ALT-0 HDMIMIX_EARC_CEC
Pin ALT-3 I2C6_SCL
Pin ALT-4 CAN2_TX
Pin ALT-5 GPIO3_IO[28]
J1.76 HDMI_DDC_SCL CPU.HDMI_DDC_SCL AC22 NVCC_3V3 I/O Pin ALT-0 HDMIMIX_EARC_SCL
Pin ALT-3 I2C5_SCL
Pin ALT-4 CAN1_TX
Pin ALT-5 GPIO3_IO[26]
J1.78 HDMI_DDC_SDA CPU.HDMI_DDC_SDA AF22 NVCC_3V3 I/O Pin ALT-0 HDMIMIX_EARC_SDA
Pin ALT-3 I2C5_SDA
Pin ALT-4 CAN1_RX
Pin ALT-5 GPIO3_IO[27]
J1.80 HDMI_HPD CPU.HDMI_HPD AE22 NVCC_3V3 I/O Pin ALT-0 HDMIMIX_EARC_DC_HPD
Pin ALT-1 AUDIOMIX_EARC_HDMI_HPD_O
Pin ALT-3 I2C6_SDA
Pin ALT-4 CAN2_RX
Pin ALT-5 GPIO3_IO[29]
J1.82 DGND DGND - - G
J1.84 HDMI_TXC_N CPU.HDMI_TXC_N AJ24 - D
J1.86 HDMI_TXC_P CPU.HDMI_TXC_P AH24 - D
J1.88 HDMI_TX0_N CPU.HDMI_TX0_N AJ25 - D
J1.90 HDMI_TX0_P CPU.HDMI_TX0_P AH25 - D
J1.92 HDMI_TX1_N CPU.HDMI_TX1_N AJ26 - D
J1.94 HDMI_TX1_P CPU.HDMI_TX1_P AH26 - D
J1.96 HDMI_TX2_N CPU.HDMI_TX2_N AJ27 - D
J1.98 HDMI_TX2_P CPU.HDMI_TX2_P AH27 - D
J1.100 DGND DGND - - G
J1.102 EARC_P_UTIL CPU.EARC_P_UTIL AJ23 VDDA_1V8 D
J1.104 EARC_N_HPD CPU.EARC_N_HPD AH22 VDDA_1V8 D
J1.106 EARC_AUX CPU.EARC_AUX AH23 VDDA_1V8 I/O
J1.108 DGND DGND - - G
J1.110 ECSPI1_MISO CPU.ECSPI1_MISO AD20 NVCC_3V3 I/O Pin ALT-0 ECSPI1_MISO
Pin ALT-1 UART3_CTS_B
Pin ALT-2 I2C2_SCL
Pin ALT-3 AUDIOMIX_SAI7_RX_DATA[0]
Pin ALT-5 GPIO5_IO[8]
J1.112 ECSPI1_MOSI CPU.ECSPI1_MOSI AC20 NVCC_3V3 I/O Pin ALT-0 ECSPI1_MOSI
Pin ALT-1 UART3_TX
Pin ALT-2 I2C1_SDA
Pin ALT-3 AUDIOMIX_SAI7_RX_BCLK
Pin ALT-5 GPIO5_IO[7]
J1.114 ECSPI1_SCLK CPU.ECSPI1_SCLK AF20 NVCC_3V3 I/O Pin ALT-0 ECSPI1_SCLK
Pin ALT-1 UART3_RX
Pin ALT-2 I2C1_SCL
Pin ALT-3 AUDIOMIX_SAI7_RX_SYNC
Pin ALT-5 GPIO5_IO[6]
J1.116 ECSPI1_SS0 CPU.ECSPI1_SS0 AE20 NVCC_3V3 I/O Pin ALT-0 ECSPI1_SS0
Pin ALT-1 UART3_RTS_B
Pin ALT-2 I2C2_SDA
Pin ALT-3 AUDIOMIX_SAI7_TX_SYNC
Pin ALT-5 GPIO5_IO[9]
J1.118 DGND DGND - - G
J1.120 ECSPI2_MISO CPU.ECSPI2_MISO AH20 NVCC_3V3 I/O Pin ALT-0 ECSPI2_MISO
Pin ALT-1 UART4_CTS_B
Pin ALT-2 I2C4_SCL
Pin ALT-3 AUDIOMIX_SAI7_MCLK
Pin ALT-4 CCM_CLKO1
Pin ALT-5 GPIO5_IO[12]
J1.122 ECSPI2_MOSI CPU.ECSPI2_MOSI AJ21 NVCC_3V3 I/O Pin ALT-0 ECSPI2_MOSI
Pin ALT-1 UART4_TX
Pin ALT-2 I2C3_SDA
Pin ALT-3 AUDIOMIX_SAI7_TX_DATA[0]
Pin ALT-5 GPIO5_IO[11]
J1.124 ECSPI2_SCLK CPU.ECSPI2_SCLK AH21 NVCC_3V3 I/O Pin ALT-0 ECSPI2_SCLK
Pin ALT-1 UART4_RX
Pin ALT-2 I2C3_SCL
Pin ALT-3 AUDIOMIX_SAI7_TX_BCLK
Pin ALT-5 GPIO5_IO[10]
J1.126 ECSPI2_SS0 CPU.ECSPI2_SS0 AJ22 NVCC_3V3 I/O Pin ALT-0 ECSPI2_SS0
Pin ALT-1 UART4_RTS_B
Pin ALT-2 I2C4_SDA
Pin ALT-4 CCM_CLKO2
Pin ALT-5 GPIO5_IO[13]
J1.128 DGND DGND - - G
J1.130 SPDIF_EXT_CLK//

ISP_FL_TRIG_0

CPU.SPDIF_EXT_CLK AC18 NVCC_3V3 I/O Hardware mounting option depending on order code

SPDIF or ISP (*)

Pin ALT-0 AUDIOMIX_SPDIF_EXT_CLK
Pin ALT-1 PWM1_OUT
Pin ALT-3 GPT1_COMPARE3
Pin ALT-5 GPIO5_IO[5]
J1.132 SPDIF_RX//

ISP_SHUTTER_TRIG_0

CPU.SPDIF_RX AD18 NVCC_3V3 I/O Hardware mounting option depending on order code

SPDIF or ISP (*)

Pin ALT-0 AUDIOMIX_SPDIF_IN
Pin ALT-1 PWM2_OUT
Pin ALT-2 I2C5_SDA
Pin ALT-3 GPT1_COMPARE2
Pin ALT-4 CAN1_RX
Pin ALT-5 GPIO5_IO[4]
J1.134 SPDIF_TX//

ISP_FLASH_TRIG_0

CPU.SPDIF_TX AE18 NVCC_3V3 I/O Hardware mounting option depending on order code

SPDIF or ISP (*)

Pin ALT-0 AUDIOMIX_SPDIF_OUT
Pin ALT-1 PWM3_OUT
Pin ALT-2 I2C5_SCL
Pin ALT-3 GPT1_COMPARE1
Pin ALT-4 CAN1_TX
Pin ALT-5 GPIO5_IO[3]
J1.136 DGND DGND - - G
J1.138 SAI2_MCLK CPU.SAI2_MCLK AJ15 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI2_MCLK
Pin ALT-1 AUDIOMIX_SAI5_MCLK
Pin ALT-2 ENET_QOS_1588_EVENT3_IN
Pin ALT-3 CAN2_RX
Pin ALT-4 ENET_QOS_1588_EVENT3_AUX_IN
Pin ALT-5 GPIO4_IO[27]
Pin ALT-6 AUDIOMIX_SAI3_MCLK
J1.140 SAI2_RXC CPU.SAI2_RXC AJ16 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI2_RX_BCLK
Pin ALT-1 AUDIOMIX_SAI5_TX_BCLK
Pin ALT-3 CAN1_TX
Pin ALT-4 UART1_RX
Pin ALT-5 GPIO4_IO[22]
Pin ALT-6 AUDIOMIX_BIT_STREAM[1]
J1.142 SAI2_RXD0 CPU.SAI2_RXD0 AJ14 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI2_RX_DATA[0]
Pin ALT-1 AUDIOMIX_SAI5_TX_DATA[0]
Pin ALT-2 ENET_QOS_1588_EVENT2_OUT
Pin ALT-3 AUDIOMIX_SAI2_TX_DATA[1]
Pin ALT-4 UART1_RTS_B
Pin ALT-5 GPIO4_IO[23]
Pin ALT-6 AUDIOMIX_PDM_BIT_STREAM[3]
J1.144 SAI2_RXFS CPU.SAI2_RXFS AH17 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI2_RX_SYNC
Pin ALT-1 AUDIOMIX_SAI5_TX_SYNC
Pin ALT-2 AUDIOMIX_SAI5_TX_DATA[1]
Pin ALT-3 AUDIOMIX_SAI2_RX_DATA[1]
Pin ALT-4 UART1_TX
Pin ALT-5 GPIO4_IO[21]
Pin ALT-6 AUDIOMIX_BIT_STREAM[2]
J1.146 SAI2_TXC CPU.SAI2_TXC AH15 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI2_TX_BCLK
Pin ALT-1 AUDIOMIX_SAI5_TX_DATA[2]
Pin ALT-3 CAN1_RX
Pin ALT-5 GPIO4_IO[25]
Pin ALT-6 AUDIOMIX_BIT_STREAM[1]
J1.148 SAI2_TXD0 CPU.SAI2_TXD0 AH16 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI2_TX_DATA[0]
Pin ALT-1 AUDIOMIX_SAI5_TX_DATA[3]
Pin ALT-2 ENET_QOS_1588_EVENT2_IN
Pin ALT-3 CAN2_TX
Pin ALT-4 ENET_QOS_1588_EVENT2_AUX_IN
Pin ALT-5 GPIO4_IO[26]
J1.150 SAI2_TXFS CPU.SAI2_TXFS AJ17 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI2_TX_SYNC
Pin ALT-1 AUDIOMIX_SAI5_TX_DATA[1]
Pin ALT-2 ENET_QOS_1588_EVENT3_OUT
Pin ALT-3 AUDIOMIX_SAI2_TX_DATA[1]
Pin ALT-4 UART1_CTS_B
Pin ALT-5 GPIO4_IO[24]
Pin ALT-6 AUDIOMIX_PDM_BIT_STREAM[2]
J1.152 SAI3_MCLK//

ISP_PRELIGHT_TRIG_0

CPU.SAI3_MCLK AJ20 NVCC_3V3 I/O Hardware mounting option depending on order code

SPDIF or ISP (*)

Pin ALT-0 AUDIOMIX_SAI3_MCLK
Pin ALT-1 PWM4_OUT
Pin ALT-2 AUDIOMIX_SAI5_MCLK
Pin ALT-4 AUDIOMIX_SPDIF_OUT
Pin ALT-5 GPIO5_IO[2]
Pin ALT-6 AUDIOMIX_SPDIF_IN
J1.154 SAI3_RXC//

ISP_SHUTTER_OPEN_0

CPU.SAI3_RXC AJ18 NVCC_3V3 I/O Hardware mounting option depending on order code

SPDIF or ISP (*)

Pin ALT-0 AUDIOMIX_SAI3_RX_BCLK
Pin ALT-1 AUDIOMIX_SAI2_RX_DATA[2]
Pin ALT-2 AUDIOMIX_SAI5_RX_BCLK
Pin ALT-3 GPT1_CLK
Pin ALT-4 UART2_CTS_B
Pin ALT-5 GPIO4_IO[29]
Pin ALT-6 AUDIOMIX_CLK
J1.156 SAI3_RXD//

ISP_FL_TRIG_1

CPU.SAI3_RXD AF18 NVCC_3V3 I/O Hardware mounting option depending on order code

SPDIF or ISP (*)

Pin ALT-0 AUDIOMIX_SAI3_RX_DATA[0]
Pin ALT-1 AUDIOMIX_SAI2_RX_DATA[3]
Pin ALT-2 AUDIOMIX_SAI5_RX_DATA[0]
Pin ALT-4 UART2_RTS_B
Pin ALT-5 GPIO4_IO[30]
Pin ALT-6 AUDIOMIX_BIT_STREAM[1]
J1.158 SAI3_RXFS//

ISP_SHUTTER_TRIG_1

CPU.SAI3_RXFS AJ19 NVCC_3V3 I/O Hardware mounting option depending on order code

SPDIF or ISP (*)

Pin ALT-0 AUDIOMIX_SAI3_RX_SYNC
Pin ALT-1 AUDIOMIX_SAI2_RX_DATA[1]
Pin ALT-2 AUDIOMIX_SAI5_RX_SYNC
Pin ALT-3 AUDIOMIX_SAI3_RX_DATA[1]
Pin ALT-4 AUDIOMIX_SPDIF1_IN
Pin ALT-5 GPIO4_IO[28]
Pin ALT-6 AUDIOMIX_PDM_BIT_STREAM[0]
J1.160 SAI3_TXC//

ISP_FLASH_TRIG_1

CPU.SAI3_TXC AH19 NVCC_3V3 I/O Hardware mounting option depending on order code

SPDIF or ISP (*)

Pin ALT-0 AUDIOMIX_SAI3_TX_BCLK
Pin ALT-1 AUDIOMIX_SAI2_TX_DATA[2]
Pin ALT-2 AUDIOMIX_SAI5_RX_DATA[2]
Pin ALT-3 GPT1_CAPTURE1
Pin ALT-4 UART2_TX
Pin ALT-5 GPIO5_IO[0]
Pin ALT-6 AUDIOMIX_PDM_BIT_STREAM[2]
J1.162 SAI3_TXD//

ISP_PRELIGHT_TRIG_1

CPU.SAI3_TXD AH18 NVCC_3V3 I/O Hardware mounting option depending on order code

SPDIF or ISP (*)

Pin ALT-0 AUDIOMIX_SAI3_TX_DATA[0]
Pin ALT-1 AUDIOMIX_SAI2_TX_DATA[3]
Pin ALT-2 AUDIOMIX_SAI5_RX_DATA[3]
Pin ALT-3 GPT1_CAPTURE2
Pin ALT-4 AUDIOMIX_SPDIF_EXT_CLK
Pin ALT-5 GPIO5_IO[1]
Pin ALT-6 SRC_BOOT_MODE[5]
J1.164 SAI3_TXFS//

ISP_SHUTTER_OPEN_1

CPU.SAI3_TXFS AC16 NVCC_3V3 I/O Hardware mounting option depending on order code

SPDIF or ISP (*)

Pin ALT-0 AUDIOMIX_SAI3_TX_SYNC
Pin ALT-1 AUDIOMIX_SAI2_TX_DATA[1]
Pin ALT-2 AUDIOMIX_SAI5_RX_DATA[1]
Pin ALT-3 AUDIOMIX_SAI3_TX_DATA[1]
Pin ALT-4 UART2_RX
Pin ALT-5 GPIO4_IO[31]
Pin ALT-6 AUDIOMIX_PDM_BIT_STREAM[3]
J1.166 SAI5_MCLK CPU.SAI5_MCLK AF14 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI5_MCLK
Pin ALT-1 AUDIOMIX_SAI1_TX_BCLK
Pin ALT-2 PWM1_OUT
Pin ALT-3 I2C5_SDA
Pin ALT-5 GPIO3_IO[25]
Pin ALT-6 CAN2_RX
J1.168 SAI5_RXC CPU.SAI5_RXC AD14 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI5_RX_BCLK
Pin ALT-1 AUDIOMIX_SAI1_TX_DATA[1]
Pin ALT-2 PWM3_OUT
Pin ALT-3 I2C6_SDA
Pin ALT-4 AUDIOMIX_CLK
Pin ALT-5 GPIO3_IO[20]
J1.170 SAI5_RXD0//

ISO_14443_LA

CPU.SAI5_RXD0 AE16 NVCC_3V3 I/O Hardware mounting option depending on order code

SAI5 or SE050 ISO (**)

Pin ALT-0 AUDIOMIX_SAI5_RX_DATA[0]
Pin ALT-1 AUDIOMIX_SAI1_TX_DATA[2]
Pin ALT-2 PWM2_OUT
Pin ALT-3 I2C5_SCL
Pin ALT-4 AUDIOMIX_BIT_STREAM[0]
Pin ALT-5 GPIO3_IO[21]
J1.172 SAI5_RXD1//

ISO_14443_LB

CPU.SAI5_RXD1 AD16 NVCC_3V3 I/O Hardware mounting option depending on order code

SAI5 or SE050 ISO (**)

Pin ALT-0 AUDIOMIX_SAI5_RX_DATA[1]
Pin ALT-1 AUDIOMIX_SAI1_TX_DATA[3]
Pin ALT-2 AUDIOMIX_SAI1_TX_SYNC
Pin ALT-3 AUDIOMIX_SAI5_TX_SYNC
Pin ALT-4 AUDIOMIX_BIT_STREAM[1]
Pin ALT-5 GPIO3_IO[22]
Pin ALT-6 CAN1_TX
J1.174 SAI5_RXD2//

ISO_7816_CLK

CPU.SAI5_RXD2 AF16 NVCC_3V3 I/O Hardware mounting option depending on order code

SAI5 or SE050 ISO (**)

Pin ALT-0 AUDIOMIX_SAI5_RX_DATA[2]
Pin ALT-1 AUDIOMIX_SAI1_TX_DATA[4]
Pin ALT-2 AUDIOMIX_SAI1_TX_SYNC
Pin ALT-3 AUDIOMIX_SAI5_TX_BCLK
Pin ALT-4 AUDIOMIX_BIT_STREAM[2]
Pin ALT-5 GPIO3_IO[23]
Pin ALT-6 CAN1_RX
J1.176 SAI5_RXD3//

ISO_7816_RST_N

CPU.SAI5_RXD3 AE14 NVCC_3V3 I/O Hardware mounting option depending on order code

SAI5 or SE050 ISO (**)

Pin ALT-0 AUDIOMIX_SAI5_RX_DATA[3]
Pin ALT-1 AUDIOMIX_SAI1_TX_DATA[5]
Pin ALT-2 AUDIOMIX_SAI1_TX_SYNC
Pin ALT-3 AUDIOMIX_SAI5_TX_DATA[0]
Pin ALT-4 AUDIOMIX_PDM_BIT_STREAM[3]
Pin ALT-5 GPIO3_IO[24]
Pin ALT-6 CAN2_TX
J1.178 SAI5_RXFS//

SE050_ENA

CPU.SAI5_RXFS AC14 NVCC_3V3 I/O Hardware mounting option depending on order code

SAI5 or SE050 (**)

Pin ALT-0 AUDIOMIX_SAI5_RX_SYNC
Pin ALT-1 AUDIOMIX_SAI1_TX_DATA[0]
Pin ALT-2 PWM4_OUT
Pin ALT-3 I2C6_SCL
Pin ALT-5 GPIO3_IO[19]
J1.180 DGND DGND - - G
J1.182 SAI1_MCLK CPU.SAI1_MCLK AE12 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_MCLK
Pin ALT-1 AUDIOMIX_SAI1_TX_BCLK
Pin ALT-4 ENET1_TX_CLK
Pin ALT-5 GPIO4_IO[20]
J1.184 SAI1_RXC CPU.SAI1_RXC AH8 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_RX_BCLK
Pin ALT-1 AUDIOMIX_PDM_CLK
Pin ALT-4 ENET1_1588_EVENT0_OUT
Pin ALT-5 GPIO4_IO[1]
J1.186 SAI1_RXD0 CPU.SAI1_RXD0 AC10 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_RX_DATA[0]
Pin ALT-2 AUDIOMIX_SAI1_TX_DATA[1]
Pin ALT-3 AUDIOMIX_PDM_BIT_STREAM[0]
Pin ALT-4 ENET1_1588_EVENT1_IN
Pin ALT-5 GPIO4_IO[2]
J1.188 SAI1_RXD1 CPU.SAI1_RXD1 AF10 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_RX_DATA[1]
Pin ALT-3 AUDIOMIX_PDM_BIT_STREAM[1]
Pin ALT-4 ENET1_1588_EVENT1_OUT
Pin ALT-5 GPIO4_IO[3]
J1.190 SAI1_RXD2 CPU.SAI1_RXD2 AH9 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_RX_DATA[2]
Pin ALT-1 AUDIOMIX_SAI5_RX_DATA[2]
Pin ALT-3 AUDIOMIX_BIT_STREAM[2]
Pin ALT-4 ENET1_MDC
Pin ALT-5 GPIO4_IO[4]
J1.192 SAI1_RXD3 CPU.SAI1_RXD3 AJ8 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_RX_DATA[3]
Pin ALT-1 AUDIOMIX_SAI5_RX_DATA[3]
Pin ALT-3 AUDIOMIX_BIT_STREAM[3]
Pin ALT-4 ENET1_MDIO
Pin ALT-5 GPIO4_IO[5]
J1.194 SAI1_RXD4 CPU.SAI1_RXD4 AD10 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_RX_DATA[4]
Pin ALT-1 AUDIOMIX_SAI6_TX_BCLK
Pin ALT-2 AUDIOMIX_SAI6_RX_BCLK
Pin ALT-4 ENET1_RGMII_RD0
Pin ALT-5 GPIO4_IO[6]
J1.196 SAI1_RXD5 CPU.SAI1_RXD5 AE10 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_RX_DATA[5]
Pin ALT-1 AUDIOMIX_SAI6_TX_DATA[0]
Pin ALT-2 AUDIOMIX_SAI6_RX_DATA[0]
Pin ALT-3 AUDIOMIX_SAI1_RX_SYNC
Pin ALT-4 ENET1_RGMII_RD1
Pin ALT-5 GPIO4_IO[7]
J1.198 SAI1_RXD6 CPU.SAI1_RXD6 AH10 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_RX_DATA[6]
Pin ALT-1 AUDIOMIX_SAI6_TX_SYNC
Pin ALT-2 AUDIOMIX_SAI6_RX_SYNC
Pin ALT-4 ENET1_RGMII_RD2
Pin ALT-5 GPIO4_IO[8]
J1.200 SAI1_RXD7 CPU.SAI1_RXD7 AH12 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_RX_DATA[7]
Pin ALT-1 AUDIOMIX_SAI6_MCLK
Pin ALT-2 AUDIOMIX_SAI1_TX_SYNC
Pin ALT-3 AUDIOMIX_SAI1_TX_DATA[4]
Pin ALT-4 ENET1_RGMII_RD3
Pin ALT-5 GPIO4_IO[9]
J1.202 SAI1_RXFS CPU.SAI1_RXFS AJ9 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_RX_SYNC
Pin ALT-4 ENET1_1588_EVENT0_IN
Pin ALT-5 GPIO4_IO[0]
J1.204 SAI1_TXC CPU.SAI1_TXC AJ12 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_TX_BCLK
Pin ALT-1 AUDIOMIX_SAI5_TX_BCLK
Pin ALT-4 ENET1_RGMII_RXC
Pin ALT-5 GPIO4_IO[11]
J1.206 SAI1_TXD0 CPU.SAI1_TXD0 AJ11 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_TX_DATA[0]
Pin ALT-1 AUDIOMIX_SAI5_TX_DATA[0]
Pin ALT-4 ENET1_RGMII_TD0
Pin ALT-5 GPIO4_IO[12]
J1.208 SAI1_TXD1 CPU.SAI1_TXD1 AJ10 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_TX_DATA[1]
Pin ALT-1 AUDIOMIX_SAI5_TX_DATA[1]
Pin ALT-4 ENET1_RGMII_TD1
Pin ALT-5 GPIO4_IO[13]
J1.210 SAI1_TXD2 CPU.SAI1_TXD2 AH11 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_TX_DATA[2]
Pin ALT-1 AUDIOMIX_SAI5_TX_DATA[2]
Pin ALT-4 ENET1_RGMII_TD2
Pin ALT-5 GPIO4_IO[14]
J1.212 SAI1_TXD3 CPU.SAI1_TXD3 AD12 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_TX_DATA[3]
Pin ALT-1 AUDIOMIX_SAI5_TX_DATA[3]
Pin ALT-4 ENET1_RGMII_TD3
Pin ALT-5 GPIO4_IO[15]
J1.214 SAI1_TXD4 CPU.SAI1_TXD4 AH13 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_TX_DATA[4]
Pin ALT-1 AUDIOMIX_SAI6_RX_BCLK
Pin ALT-2 AUDIOMIX_SAI6_TX_BCLK
Pin ALT-4 ENET1_RGMII_TX_CTL
Pin ALT-5 GPIO4_IO[16]
J1.216 SAI1_TXD5 CPU.SAI1_TXD5 AH14 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_TX_DATA[5]
Pin ALT-1 AUDIOMIX_SAI6_RX_DATA[0]
Pin ALT-2 AUDIOMIX_SAI6_TX_DATA[0]
Pin ALT-4 ENET1_RGMII_TXC
Pin ALT-5 GPIO4_IO[17]
J1.218 SAI1_TXD6 CPU.SAI1_TXD6 AC12 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_TX_DATA[6]
Pin ALT-1 AUDIOMIX_SAI6_RX_SYNC
Pin ALT-2 AUDIOMIX_SAI6_TX_SYNC
Pin ALT-4 ENET1_RX_ER
Pin ALT-5 GPIO4_IO[18]
J1.220 SAI1_TXD7 CPU.SAI1_TXD7 AJ13 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_TX_DATA[7]
Pin ALT-1 AUDIOMIX_SAI6_MCLK
Pin ALT-3 AUDIOMIX_CLK
Pin ALT-4 ENET1_TX_ER
Pin ALT-5 GPIO4_IO[19]
J1.222 SAI1_TXFS CPU.SAI1_TXFS AF12 NVCC_3V3 I/O Pin ALT-0 AUDIOMIX_SAI1_TX_SYNC
Pin ALT-1 AUDIOMIX_SAI5_TX_SYNC
Pin ALT-4 ENET1_RGMII_RX_CTL
Pin ALT-5 GPIO4_IO[10]
J1.224 DGND DGND - - G
J1.226

(SE on board)

I2C1_SCL//

I2C_SCL_SE050

SE.ISO 7816 IO2 16 SE_VOUT I/O see SE section for

more details

J1.226 I2C1_SCL//

I2C_SCL_SE050

CPU.I2C1_SCL AC8 NVCC_3V3 I/O Pin ALT-0 I2C1_SCL
Pin ALT-1 ENET_QOS_MDC
Pin ALT-3 ECSPI1_SCLK
Pin ALT-5 GPIO5_IO[14]
J1.228

(SE on board)

I2C1_SDA//

I2C_SDA_SE050

SE.ISO 7816 IO1 3 SE_VOUT I/O see SE section for

more details

J1.228 I2C1_SDA//

I2C_SDA_SE050

CPU.I2C1_SDA AH7 NVCC_3V3 I/O Pin ALT-0 I2C1_SDA
Pin ALT-1 ENET_QOS_MDIO
Pin ALT-3 ECSPI1_MOSI
Pin ALT-5 GPIO5_IO[15]
J1.230 I2C2_SCL CPU.I2C2_SCL AH6 NVCC_3V3 I/O Pin ALT-0 I2C2_SCL
Pin ALT-1 ENET_QOS_1588_EVENT1_IN
Pin ALT-2 USDHC3_CD_B
Pin ALT-3 ECSPI1_MISO
Pin ALT-4 ENET_QOS_1588_EVENT1_AUX_IN
Pin ALT-5 GPIO5_IO[16]
J1.232 I2C2_SDA CPU.I2C2_SDA AE8 NVCC_3V3 I/O Pin ALT-0 I2C2_SDA
Pin ALT-1 ENET_QOS_1588_EVENT1_OUT
Pin ALT-2 USDHC3_WP
Pin ALT-3 ECSPI1_SS0
Pin ALT-5 GPIO5_IO[17]
J1.234 I2C3_SCL CPU.I2C3_SCL AJ7 NVCC_3V3 I/O Pin ALT-0 I2C3_SCL
Pin ALT-1 PWM4_OUT
Pin ALT-2 GPT2_CLK
Pin ALT-3 ECSPI2_SCLK
Pin ALT-5 GPIO5_IO[18]
J1.236 I2C3_SDA CPU.I2C3_SDA AJ6 NVCC_3V3 I/O Pin ALT-0 I2C3_SDA
Pin ALT-1 PWM3_OUT
Pin ALT-2 GPT3_CLK
Pin ALT-3 ECSPI2_MOSI
Pin ALT-5 GPIO5_IO[19]
J1.238 I2C4_SCL CPU.I2C4_SCL AF8 NVCC_3V3 I/O Pin ALT-0 I2C4_SCL
Pin ALT-1 PWM2_OUT
Pin ALT-2 PCIE_CLKREQ_B
Pin ALT-3 ECSPI2_MISO
Pin ALT-5 GPIO5_IO[20]
J1.240 I2C4_SDA CPU.I2C4_SDA AD8 NVCC_3V3 I/O Pin ALT-0 I2C4_SDA
Pin ALT-1 PWM1_OUT
Pin ALT-3 ECSPI2_SS0
Pin ALT-5 GPIO5_IO[21]
J1.242 DGND DGND - - G
J1.244 UART1_RXD CPU.UART1_RXD AD6 NVCC_3V3 I/O Pin ALT-0 UART1_RX
Pin ALT-1 ECSPI3_SCLK
Pin ALT-5 GPIO5_IO[22]
J1.246 UART1_TXD CPU.UART1_TXD AJ13 NVCC_3V3 I/O Pin ALT-0 UART1_TX
Pin ALT-1 ECSPI3_MOSI
Pin ALT-5 GPIO5_IO[23]
J1.248 UART2_RXD CPU.UART2_RXD AF6 NVCC_3V3 I/O Pin ALT-0 UART2_RX
Pin ALT-1 ECSPI3_MISO
Pin ALT-3 GPT1_COMPARE3
Pin ALT-5 GPIO5_IO[24]
J1.250 UART2_TXD CPU.UART2_TXD AH4 NVCC_3V3 I/O Pin ALT-0 UART2_TX
Pin ALT-1 ECSPI3_SS0
Pin ALT-3 GPT1_COMPARE2
Pin ALT-5 GPIO5_IO[25]
J1.252 UART3_RXD CPU.UART3_RXD AE6 NVCC_3V3 I/O Pin ALT-0 UART3_RX
Pin ALT-1 UART1_CTS_B
Pin ALT-2 USDHC3_RESET_B
Pin ALT-3 GPT1_CAPTURE2
Pin ALT-4 CAN2_TX
Pin ALT-5 GPIO5_IO[26]
J1.254 UART3_TXD CPU.UART3_TXD AJ4 NVCC_3V3 I/O Pin ALT-0 UART3_TX
Pin ALT-1 UART1_RTS_B
Pin ALT-2 USDHC3_VSELECT
Pin ALT-3 GPT1_CLK
Pin ALT-4 CAN2_RX
Pin ALT-5 GPIO5_IO[27]
J1.256 UART4_RXD CPU.UART4_RXD AJ15 NVCC_3V3 I/O Pin ALT-0 UART4_RX
Pin ALT-1 UART2_CTS_B
Pin ALT-2 PCIE_CLKREQ_B
Pin ALT-3 GPT1_COMPARE1
Pin ALT-4 I2C6_SCL
Pin ALT-5 GPIO5_IO[28]
J1.258 UART4_TXD CPU.UART4_TXD AH5 NVCC_3V3 I/O Pin ALT-0 UART4_TX
Pin ALT-1 UART2_RTS_B
Pin ALT-3 GPT1_CAPTURE1
Pin ALT-4 I2C6_SDA
Pin ALT-5 GPIO5_IO[29]
J1.260 DGND DGND - - G

(*) SPIDF and ISP signals cannot be present at the same time. ISP signals are in alternative to NAND and eMMC usage (see i.MX8Plus NAND controller on Reference Manual for more details). Please contact sales for more information

(**) SAI5 and SE050 ISO interface cannot be present at the same time. Please contact sales for more information