Difference between revisions of "ORCA SOM/ORCA Hardware/Peripherals/PCI Express"
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! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History | ! colspan="4" style="width:100%; text-align:left" ; border-bottom:solid 2px #ededed" |History | ||
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! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes | ! style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white" |Notes | ||
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<section end="History" /> | <section end="History" /> | ||
<section begin="Body" /> | <section begin="Body" /> | ||
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==Peripheral PCI Express == | ==Peripheral PCI Express == | ||
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PCI Express (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard, designed to replace the older PCI, PCI-X and AGP bus standards. | PCI Express (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard, designed to replace the older PCI, PCI-X and AGP bus standards. | ||
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The Pin mapping is described in the [[ORCA SOM/ORCA Hardware/Pinout_Table | Pinout table section]] | The Pin mapping is described in the [[ORCA SOM/ORCA Hardware/Pinout_Table | Pinout table section]] | ||
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[[Category:ORCA]] | [[Category:ORCA]] | ||
Latest revision as of 18:38, 28 December 2023
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Peripheral PCI Express[edit | edit source]
PCI Express (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard, designed to replace the older PCI, PCI-X and AGP bus standards.
Description[edit | edit source]
The PCI Express interface available on ORCA is based on iMX8MPlus SoC.
The PCI Express interface supports the following standards and features:
- two PCIe PHY ports (1-lane each)
- up to 8.0 Gbps data rate
- complies to PCI Express Gen3 specification
- 8B/10B Encoding / Decoding
- Supports Spread Spectrum Clocking in Transmitter and Receiver
Pin mapping[edit | edit source]
The Pin mapping is described in the Pinout table section
