Difference between revisions of "ORCA SOM/ORCA Hardware/Peripherals/IPS"
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==Peripheral ISP == | ==Peripheral ISP == | ||
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The Image Signal Processor (ISP) available on ORCA is based on iMX8MPlus SoC wich provides the following interfaces: | The Image Signal Processor (ISP) available on ORCA is based on iMX8MPlus SoC wich provides the following interfaces: | ||
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The Pin mapping is described in the [[ORCA SOM/ORCA Hardware/Pinout_Table | Pinout table section]] | The Pin mapping is described in the [[ORCA SOM/ORCA Hardware/Pinout_Table | Pinout table section]] | ||
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[[Category:ORCA]] | [[Category:ORCA]] | ||
Revision as of 15:33, 13 December 2021
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Peripheral ISP[edit | edit source]
The Image Signal Processor (ISP) available on ORCA is based on iMX8MPlus SoC wich provides the following interfaces:
- I/O signals to control mechanical shutter, flash and other advanced camera features
Description[edit | edit source]
The Image Signal Processing (ISP) core is a complete video and still picture input block. It contains image processing and color space conversion (RAW Bayer to YUV) functions.
The ISP is connected to a MIPI-CSI interface and receives 1 pixel/clock from the CSI Rx Controller.
The following features are supported by the main ISP submodule:
- ITU-R BT.601 compatible 12-bit video interface
- Variable sensor interface for RGB-Bayer Sensors
- Lens shade correction
- Filter (Noise reduction, Sharpness, Blurring)
- Programmable gamma correction for sensor adaptation and display correction
- Exposure measurement for AE (AEC/AGC) Auto focus measurement (AF)
- Mechanical shutter control
- Flash light control
- Video Stabilization
Pin mapping[edit | edit source]
The Pin mapping is described in the Pinout table section
