Difference between revisions of "ORCA SOM/ORCA Hardware/Peripherals/Ethernet"
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=== Description === | === Description === | ||
| − | The 10/100/1000-Mbit/s Ethernet | + | The 10/100/1000-Mbit/s Ethernet interfaces available on ORCA is based on iMX8MPlus SoC wich provides the following interfaces: |
| + | * 2x RGMII ENET with IEEE 1588 functionality | ||
| − | + | One interface is directly connected with an on board ETH PHY chip (MICROCHIP KSZ9131RNX) that has the following features: | |
* Auto-Negotiation to Automatically Select the Highest Link-Up Speed (10/100/1000 Mbps) and Duplex (Half/Full) | * Auto-Negotiation to Automatically Select the Highest Link-Up Speed (10/100/1000 Mbps) and Duplex (Half/Full) | ||
* On-Chip Termination Resistors for the Differential Pairs | * On-Chip Termination Resistors for the Differential Pairs | ||
* Energy Detect Power-Down Mode for Reduced Power Consumption When the Cable is Not Attached | * Energy Detect Power-Down Mode for Reduced Power Consumption When the Cable is Not Attached | ||
| − | + | ||
=== Important note for the external magnetic connection === | === Important note for the external magnetic connection === | ||
Revision as of 15:29, 3 February 2021
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Contents
Peripheral Ethernet[edit | edit source]
Description[edit | edit source]
The 10/100/1000-Mbit/s Ethernet interfaces available on ORCA is based on iMX8MPlus SoC wich provides the following interfaces:
- 2x RGMII ENET with IEEE 1588 functionality
One interface is directly connected with an on board ETH PHY chip (MICROCHIP KSZ9131RNX) that has the following features:
- Auto-Negotiation to Automatically Select the Highest Link-Up Speed (10/100/1000 Mbps) and Duplex (Half/Full)
- On-Chip Termination Resistors for the Differential Pairs
- Energy Detect Power-Down Mode for Reduced Power Consumption When the Cable is Not Attached
Important note for the external magnetic connection[edit | edit source]
The Ethernet peripheral requires an external insulator magnetic on the carrier board.
The four transformer center tap pins on the PHY side should not be connected to any power supply source on the board; rather, the center tap pins should be separated from one another and connected through separate 0.1 µF common-mode capacitors to ground. Separation is required because the common-mode voltage could be different between the four differential pairs, depending on the connected speed mode.
See KSZ9131RNX datasheet for more details.
Pin mapping[edit | edit source]
The Pin mapping is described in the Pinout table section
