Difference between revisions of "ORCA SOM/ORCA Hardware/Peripherals/CAN"

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<section end="History" />
 
<section end="History" />
<section begin="Preliminary" />
 
  
 
==Peripheral CAN ==
 
==Peripheral CAN ==
 
{{Wip|text=Documentation under NXP's NDA: please refer to helpdesk@dave.eu }}
 
 
<section end="Preliminary" />
 
 
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<section begin="Body" />
 
 
  
 
The CAN interface available on ORCA SoM is based on iMX8MPlus SoC which provides the following interfaces:
 
The CAN interface available on ORCA SoM is based on iMX8MPlus SoC which provides the following interfaces:
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The FlexCAN module includes these distinctive features:
 
The FlexCAN module includes these distinctive features:
* Full implementation of the CAN with Flexible Data Rate (CAN FD) protocol specification and CAN protocol specification, Version 2.0 B
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* Full implementation of the CAN with Flexible Data Rate (CAN FD) protocol specification and CAN protocol specification, Version 2.0 B
 
* Compliant with the ISO 11898-1 standard
 
* Compliant with the ISO 11898-1 standard
 
* Full-featured Rx FIFO with storage capacity for up to six frames and automatic internal pointer handling with DMA support
 
* Full-featured Rx FIFO with storage capacity for up to six frames and automatic internal pointer handling with DMA support
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The Pin mapping is described in the [[ORCA SOM/ORCA Hardware/Pinout_Table | Pinout table section]]
 
The Pin mapping is described in the [[ORCA SOM/ORCA Hardware/Pinout_Table | Pinout table section]]
 
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[[Category:ORCA]]
 
[[Category:ORCA]]

Revision as of 09:04, 18 June 2021

History
Version Issue Date Notes
1.0.0 Jun 2021 First release


Peripheral CAN[edit | edit source]

The CAN interface available on ORCA SoM is based on iMX8MPlus SoC which provides the following interfaces:

  • 2x FlexCAN

Description[edit | edit source]

The FlexCAN module is a communication controller implementing the CAN protocol according to the ISO 11898-1 standard and CAN 2.0 B protocol specifications.

The FlexCAN module includes these distinctive features:

  • Full implementation of the CAN with Flexible Data Rate (CAN FD) protocol specification and CAN protocol specification, Version 2.0 B
  • Compliant with the ISO 11898-1 standard
  • Full-featured Rx FIFO with storage capacity for up to six frames and automatic internal pointer handling with DMA support
  • Time stamp based on 16-bit free running timer
  • Global network time, synchronized by a specific message
  • Maskable interrupts
  • Supports detection and correction of errors in memory read accesses

Pin mapping[edit | edit source]

The Pin mapping is described in the Pinout table section