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Difference between revisions of "Enabling SPI1 and SPI3 on Linux (Naon)"

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{{InfoBoxTop}}
 
{{InfoBoxTop}}
 
{{AppliesToNaon}}
 
{{AppliesToNaon}}
 +
{{Applies To NaonEVB-Mid}}
 
{{Applies To Linux}}
 
{{Applies To Linux}}
 
{{InfoBoxBottom}}
 
{{InfoBoxBottom}}
Line 6: Line 7:
 
=== Introduction ===
 
=== Introduction ===
  
−
This article shows how to enable the SPI1 and SPI3 interfaces which can be used in a standard Linux application.
+
This article shows how to enable the SPI1 and SPI3 (with CS1 chip select) interfaces which can be used in a standard Linux application.
  
 
=== Pin Mux Option ===
 
=== Pin Mux Option ===
  
−
SPI1 signals are available at different Naon pins. The following configuration can be used:
+
SPI signals are available at different Naon pins. '''The configuration described below is dedicated to the NaonEVB-Mid carrier board''', which provides the SPI1 and SPI3 signals at the '''J21''' connector (please refer to [[NaonEVB-Mid | NaonEVB-Mid wiki page]] for further details).
 +
 
 +
The following is the pin multiplexing configuration:
  
−
==== Option 1 ====
 
 
{|class="wikitable" style="text-align:right"  
 
{|class="wikitable" style="text-align:right"  
 
!Signal
 
!Signal
 
!Naon Connector Phisical Pin
 
!Naon Connector Phisical Pin
 
!CPU Ball
 
!CPU Ball
 +
|-
 +
|SPI1_SCLK
 +
|J1.34
 +
|AC3
 +
|-
 +
|SPI1_SCS1n
 +
|J2.112
 +
|W6
 +
|-
 +
|SPI1_D0
 +
|J1.37
 +
|AA6
 +
|-
 +
|SPI1_D1
 +
|J1.90
 +
|AA3
 
|-
 
|-
 
|
 
|
Line 22: Line 40:
 
|
 
|
 
|-
 
|-
−
|
+
|SPI3_SCLK
−
|
+
|J2.99
−
|
+
|AC26
 
|-
 
|-
−
|
+
|SPI3_SCS1n
−
|
+
|J2.111
−
|
+
|AG27
 
|-
 
|-
−
|
+
|SPI3_D0
−
|
+
|J2.89
−
|
+
|V22
 
|-
 
|-
−
|
+
|SPI3_D1
−
|
+
|J2.87
−
|
+
|AA25
 
|}
 
|}
  
−
=== U-Boot patches ===
+
=== U-Boot patch ===
  
 
{{ImportantMessage|text=The patches below applies to NELK 4.0.0 and above U-Boot source tree.}}
 
{{ImportantMessage|text=The patches below applies to NELK 4.0.0 and above U-Boot source tree.}}
  
  
−
The files <code>arch/arm/mach-omap2/board-diva.c</code> and <code>arch/arm/mach-omap2/diva_pinmux_table.h</code> must be modified according to the following patches:
+
The files <code>board/dave/naon/pinmux_evb_mid.h</code> must be modified according to the following patch:
  
−
<diff>
+
<syntaxhighlight lang="diff">
−
</diff>
+
diff --git a/board/dave/naon/pinmux_evb_mid.h b/board/dave/naon/pinmux_evb_mid.h
 +
index ae21ca3..df3783f 100644
 +
--- a/board/dave/naon/pinmux_evb_mid.h
 +
+++ b/board/dave/naon/pinmux_evb_mid.h
 +
@@ -45,7 +45,7 @@ MUX_VAL(PINCNTL3, (IEN | IPU | FCN1 )) /* SD1_DAT[0] */\
 +
MUX_VAL(PINCNTL4, (IEN | IPU | FCN1 )) /* SD1_DAT[1]_SDIRQ */\
 +
MUX_VAL(PINCNTL5, (IEN | IPU | FCN1 )) /* SD1_DAT[2]_SDRW */\
 +
MUX_VAL(PINCNTL6, (IEN | IPU | FCN1 )) /* SD1_DAT[3] */\
 +
-MUX_VAL(PINCNTL7, (IEN | IPU | DISABLED )) /* safe_mode */\
 +
+MUX_VAL(PINCNTL7, (IEN | IPU | FCN2 )) /* SPI[1]_SCS[1] */\
 +
MUX_VAL(PINCNTL8, (IEN | IPU | FCN1 )) /* SD0_CLK */\
 +
MUX_VAL(PINCNTL9, (IEN | IPU | FCN1 )) /* SD0_CMD */\
 +
MUX_VAL(PINCNTL10, (IEN | IPU | FCN1 )) /* SD0_DAT[0] */\
 +
@@ -258,10 +258,10 @@ MUX_VAL(PINCNTL218, (IEN | IPD | DISABLED )) /* safe_mode */\
 +
MUX_VAL(PINCNTL219, (IEN | IPD | DISABLED )) /* safe_mode */\
 +
MUX_VAL(PINCNTL220, (IEN | IPD | DISABLED )) /* safe_mode */\
 +
MUX_VAL(PINCNTL221, (IEN | IPD | DISABLED )) /* safe_mode */\
 +
-MUX_VAL(PINCNTL222, (IEN | IPD | DISABLED )) /* safe_mode */\
 +
-MUX_VAL(PINCNTL223, (IEN | IPD | DISABLED )) /* safe_mode */\
 +
-MUX_VAL(PINCNTL224, (IEN | IPD | DISABLED )) /* safe_mode */\
 +
-MUX_VAL(PINCNTL225, (IEN | IPD | DISABLED )) /* safe_mode */\
 +
+MUX_VAL(PINCNTL222, (IEN | IPU | FCN6 )) /* SPI[3]_SCS[1] */\
 +
+MUX_VAL(PINCNTL223, (IEN | DIS | FCN6 )) /* SPI[3]_SCLK_MUX1 */\
 +
+MUX_VAL(PINCNTL224, (IEN | DIS | FCN6 )) /* SPI[3]_D[1]_MUX1 */\
 +
+MUX_VAL(PINCNTL225, (IEN | DIS | FCN6 )) /* SPI[3]_D[0]_MUX1 */\
 +
MUX_VAL(PINCNTL226, (IEN | IPD | DISABLED )) /* safe_mode */\
 +
MUX_VAL(PINCNTL227, (IEN | IPD | DISABLED )) /* safe_mode */\
 +
MUX_VAL(PINCNTL228, (IEN | IPU | FCN7 )) /* I2C[2]_SCL_MUX2 */\
 +
</syntaxhighlight>
  
 
U-Boot must be rebuilt to make these modifications effective.
 
U-Boot must be rebuilt to make these modifications effective.
  
−
 
+
=== Linux kernel patch ===
−
 
 
−
=== Linux kernel patches ===
 
  
 
{{ImportantMessage|text=The patches below applies to NELK 4.0.0 and above Linux source tree.}}
 
{{ImportantMessage|text=The patches below applies to NELK 4.0.0 and above Linux source tree.}}
  
  
−
The files <code>arch/arm/mach-omap2/board-diva.c</code> and <code>arch/arm/mach-omap2/diva_pinmux_table.h</code> must be modified according to the following patches:
+
The files <code>arch/arm/mach-omap2/board-naon.c</code> and <code>drivers/spi/omap2_mcspi.c</code> must be modified according to the following patch:
  
 
<diff>
 
<diff>
 +
diff --git a/arch/arm/mach-omap2/board-naon.c b/arch/arm/mach-omap2/board-naon.c
 +
index 683af8e..e9d5023 100644
 +
--- a/arch/arm/mach-omap2/board-naon.c
 +
+++ b/arch/arm/mach-omap2/board-naon.c
 +
@@ -794,6 +794,21 @@ struct spi_board_info __initdata naon_spi_slave_info[] = {
 +
.chip_select = 0,
 +
},
 +
#endif
 +
+
 +
+        {
 +
+            .modalias = "spidev",
 +
+            .mode=SPI_MODE_0,
 +
+            .max_speed_hz = 2000000,    /* max spiclock (SCK) speed in HZ */
 +
+            .bus_num = 2,
 +
+            .chip_select = 1,
 +
+        },
 +
+        {
 +
+            .modalias = "spidev",
 +
+            .mode=SPI_MODE_0,
 +
+            .max_speed_hz = 2000000,    /* max spiclock (SCK) speed in HZ */
 +
+            .bus_num = 4,
 +
+            .chip_select = 1,
 +
+        },
 +
};
 +
 +
void __init naon_spi_init(void)
 +
diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c
 +
index 06f586e..848a8e7 100644
 +
--- a/drivers/spi/omap2_mcspi.c
 +
+++ b/drivers/spi/omap2_mcspi.c
 +
@@ -1182,7 +1182,7 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
 +
case 4:
 +
rxdma_id = spi4_rxdma_id;
 +
txdma_id = spi4_txdma_id;
 +
- num_chipselect = 1;
 +
+ num_chipselect = 2;
 +
break;
 +
#endif
 +
default:
 
</diff>
 
</diff>
 +
 +
Please note that SPI bus_num values to be used into the naon_spi_slave_info are:
 +
 +
* SPI1: .bus_num = 2
 +
* SPI3: .bus_num = 4
 +
  
 
The kernel must be rebuilt to make these modifications effective.
 
The kernel must be rebuilt to make these modifications effective.
−
 
  
 
=== Using the interfaces ===
 
=== Using the interfaces ===
Line 75: Line 163:
 
=== Patch download ===
 
=== Patch download ===
  
−
* U-Boot:  
+
* U-Boot: [[File:U-boot-nelk-spi1-cs1-spi3-cs1.patch.zip]]
−
* Linux:
+
* Linux: [[File:Linux-nelk-spi1-cs1-spi3-cs1.patch.zip]]

Latest revision as of 20:26, 29 May 2018

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Naon am387x-dm814x.png Applies to Naon
Naon-evb-mid top.png Applies to NaonEVB-Mid
Tux.png Applies to Linux

Contents

IntroductionEdit

This article shows how to enable the SPI1 and SPI3 (with CS1 chip select) interfaces which can be used in a standard Linux application.

Pin Mux OptionEdit

SPI signals are available at different Naon pins. The configuration described below is dedicated to the NaonEVB-Mid carrier board, which provides the SPI1 and SPI3 signals at the J21 connector (please refer to NaonEVB-Mid wiki page for further details).

The following is the pin multiplexing configuration:

Signal Naon Connector Phisical Pin CPU Ball
SPI1_SCLK J1.34 AC3
SPI1_SCS1n J2.112 W6
SPI1_D0 J1.37 AA6
SPI1_D1 J1.90 AA3
SPI3_SCLK J2.99 AC26
SPI3_SCS1n J2.111 AG27
SPI3_D0 J2.89 V22
SPI3_D1 J2.87 AA25

U-Boot patchEdit

 

The patches below applies to NELK 4.0.0 and above U-Boot source tree.


The files board/dave/naon/pinmux_evb_mid.h must be modified according to the following patch: 

diff --git a/board/dave/naon/pinmux_evb_mid.h b/board/dave/naon/pinmux_evb_mid.h
index ae21ca3..df3783f 100644
--- a/board/dave/naon/pinmux_evb_mid.h
+++ b/board/dave/naon/pinmux_evb_mid.h
@@ -45,7 +45,7 @@ MUX_VAL(PINCNTL3, (IEN | IPU | FCN1 )) /* SD1_DAT[0] */\
 MUX_VAL(PINCNTL4, (IEN | IPU | FCN1 )) /* SD1_DAT[1]_SDIRQ */\
 MUX_VAL(PINCNTL5, (IEN | IPU | FCN1 )) /* SD1_DAT[2]_SDRW */\
 MUX_VAL(PINCNTL6, (IEN | IPU | FCN1 )) /* SD1_DAT[3] */\
-MUX_VAL(PINCNTL7, (IEN | IPU | DISABLED )) /* safe_mode */\
+MUX_VAL(PINCNTL7, (IEN | IPU | FCN2 )) /* SPI[1]_SCS[1] */\
 MUX_VAL(PINCNTL8, (IEN | IPU | FCN1 )) /* SD0_CLK */\
 MUX_VAL(PINCNTL9, (IEN | IPU | FCN1 )) /* SD0_CMD */\
 MUX_VAL(PINCNTL10, (IEN | IPU | FCN1 )) /* SD0_DAT[0] */\
@@ -258,10 +258,10 @@ MUX_VAL(PINCNTL218, (IEN | IPD | DISABLED )) /* safe_mode */\
 MUX_VAL(PINCNTL219, (IEN | IPD | DISABLED )) /* safe_mode */\
 MUX_VAL(PINCNTL220, (IEN | IPD | DISABLED )) /* safe_mode */\
 MUX_VAL(PINCNTL221, (IEN | IPD | DISABLED )) /* safe_mode */\
-MUX_VAL(PINCNTL222, (IEN | IPD | DISABLED )) /* safe_mode */\
-MUX_VAL(PINCNTL223, (IEN | IPD | DISABLED )) /* safe_mode */\
-MUX_VAL(PINCNTL224, (IEN | IPD | DISABLED )) /* safe_mode */\
-MUX_VAL(PINCNTL225, (IEN | IPD | DISABLED )) /* safe_mode */\
+MUX_VAL(PINCNTL222, (IEN | IPU | FCN6 )) /* SPI[3]_SCS[1] */\
+MUX_VAL(PINCNTL223, (IEN | DIS | FCN6 )) /* SPI[3]_SCLK_MUX1 */\
+MUX_VAL(PINCNTL224, (IEN | DIS | FCN6 )) /* SPI[3]_D[1]_MUX1 */\
+MUX_VAL(PINCNTL225, (IEN | DIS | FCN6 )) /* SPI[3]_D[0]_MUX1 */\
 MUX_VAL(PINCNTL226, (IEN | IPD | DISABLED )) /* safe_mode */\
 MUX_VAL(PINCNTL227, (IEN | IPD | DISABLED )) /* safe_mode */\
 MUX_VAL(PINCNTL228, (IEN | IPU | FCN7 )) /* I2C[2]_SCL_MUX2 */\

U-Boot must be rebuilt to make these modifications effective.

Linux kernel patchEdit

 

The patches below applies to NELK 4.0.0 and above Linux source tree.


The files arch/arm/mach-omap2/board-naon.c and drivers/spi/omap2_mcspi.c must be modified according to the following patch: 

diff --git a/arch/arm/mach-omap2/board-naon.c b/arch/arm/mach-omap2/board-naon.c
index 683af8e..e9d5023 100644
--- a/arch/arm/mach-omap2/board-naon.c
+++ b/arch/arm/mach-omap2/board-naon.c
@@ -794,6 +794,21 @@ struct spi_board_info __initdata naon_spi_slave_info[] = {
 		.chip_select	= 0,
 	},
 #endif
+
+        {
+            .modalias = "spidev",
+            .mode=SPI_MODE_0,
+            .max_speed_hz = 2000000,     /* max spiclock (SCK) speed in HZ */
+            .bus_num = 2,
+            .chip_select = 1,
+        },
+        {
+            .modalias = "spidev",
+            .mode=SPI_MODE_0,
+            .max_speed_hz = 2000000,     /* max spiclock (SCK) speed in HZ */
+            .bus_num = 4,
+            .chip_select = 1,
+        },
 };
 
 void __init naon_spi_init(void)
diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c
index 06f586e..848a8e7 100644
--- a/drivers/spi/omap2_mcspi.c
+++ b/drivers/spi/omap2_mcspi.c
@@ -1182,7 +1182,7 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
 	case 4:
 		rxdma_id = spi4_rxdma_id;
 		txdma_id = spi4_txdma_id;
-		num_chipselect = 1;
+		num_chipselect = 2;
 		break;
 #endif
 	default:

Please note that SPI bus_num values to be used into the naon_spi_slave_info are:

  • SPI1: .bus_num = 2
  • SPI3: .bus_num = 4


The kernel must be rebuilt to make these modifications effective.

Using the interfacesEdit

Users can access the peripherals connected to the SP1 and SPI3 buses through the spidev interface. For further information, please refer to

Patch downloadEdit

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