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ETRA SOM/ETRA Hardware/Peripherals/Watchdog

< ETRA SOM‎ | ETRA Hardware
Revision as of 13:27, 31 December 2020 by U0016 (talk | contribs)

History
Version Issue Date Notes
1.0.0 Dec 2020 First Release



Contents

Peripheral WatchdogEdit

DescriptionEdit

The Watchdog interfaces available on ETRA SoM are based on STM32MP1 SoC.

The Watchdog portssupports the following standards and features:

  • two independent watchdogs (IWDG1 and IWDG2) dedicated to MPU
    • 12-bit down-counter and 8-bit prescaler
    • dual voltage domain, thus enabling operation in low-power modes
    • independent 32 kHz internal RC clock that operate in Stop and Standby modes
  • one window watchdog (WWDG1) dedicated to the MCU
    • programmable free-running 7-bit downcounter
    • conditional reset
    • early wakeup interrupt
    • can be frozen in debug mode
  • the MPU can receive an interrupt if the WWDG1 generates a reset