ETRA SOM/ETRA Hardware/Peripherals/SPI

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History
Issue Date Notes
2020/12/31 First Release



Peripheral SPI[edit | edit source]

The Serial Peripheral Interface (SPI) is a full-duplex, synchronous, four-wire serial communication block.

Description[edit | edit source]

The SPI interface available on ETRA SOM is based on STM32MP1 SoC.

The SPI port supports the following standards and features:

  • full-duplex synchronous transfers on three lines
  • half-duplex synchronous transfer on two lines (with bidirectional data line)
  • simplex synchronous transfers on two lines (with unidirectional data line)
  • 4-bit to 32-bit data size selection
  • multi master or multi slave mode capability
  • hardware or software management of SS for both master and slave
  • configurable SS signal polarity and timing, MISO x MOSI swap capability
  • two 16x or 8x 8-bit embedded Rx and TxFIFOs with DMA capability

Pin mapping[edit | edit source]

The Pin mapping is described in the Pinout table section