Creating and building example Vivado project (BELK/BXELK)

The following sections describe how to perform the most common tasks for building the software components for a BORA/BORAX-based embedded system.

Creating and building a Zynq project for BORA using the command line

• start the Zynq development server and login into the system
• assuming that a local repository has not been created, clone the remote BORA git repository:

  git clone git@git.dave.eu:dave/bora/bora.git

• copy the <bora_repo>/boards/board_parts/zynq/BELK_2.2.0 directory to <vivado_2014.4_install_dir>/data/boards/board_parts/zynq/ :

cd <bora_repo>
sudo cp -r boards/board_parts/zynq/BELK_2.2.0 /opt/Xilinx/Vivado/2014.4/data/boards/board_parts/zynq/

• enter the git directory and launch the following command

  export PROJ_DIR=$(pwd)/../bora-build-YYYYMMDD-nobk

• launch the Vivado Design Suite with the following commands:

. /opt/Xilinx/Vivado/2014.4/settings64.sh1
vivado -mode tcl -source build_project.tcl -notrace -tclargs "-bitstream"

• at the end of the bitstream build process, the build_project script allows to automatically export hardware and lauch SDK to build the FSBL
• once the Xilinx SDK is ready, perform the following operations from the GUI:
  • Click on File -> New -> Application Project
  • Select the Project Name: bora_FSBL
  • Click Next
  • Select Template: Zynq FSBL
  • Click on Finish
  • Apply the patch, right-clicking on bora_FSBL in Project Explorer and then by clicking on Team -> Apply Patch..
  • From Browse... open the file <bora_repo>/patch/belk-sd-boot.patch
  • Click Next
  • Select Apply the patch to the selected file, folder or project: and select main.c from bora_FSBL -> src
  • Click Next
  • Check that the patch is correctly applied to the source code and click on Finish
• the FSBL (ELF file) is built automatically
• create the binary from the FSBL ELF chosing one of the following options:
  • launch this command manually

arm-xilinx-eabi-objcopy -v -O binary $PROJ_DIR/bora.sdk/SDK/SDK_Export/bora_FSBL/Debug/bora_FSBL.elf $PROJ_DIR/bora.sdk/SDK/SDK_Export/bora_FSBL/Debug/bora_FSBL.bin

• • configure the automatic binary generation on project build. In Project Explorer, right-click on bora_FSBL project, select C/C++ Build Settings and add the command arm-xilinx-eabi-objcopy -v -O binary ${ProjName}.elf ${ProjName}.bin on Post-build steps
• create the BOOT.bin image (single file including FSBL, FPGA and U-boot for uSD boot:
  • select the bora_FSBL project in Project Explorer
  • click on Xilinx Tools -> Create Zynq Boot Image
• if the project is correctly configured, the tool builds automatically all the component listed in the form, so just add U-Boot to the list
• otherwise, select Create new BIF file and set the output path and in Boot image partitions add the following files:
  • bora_FSBL.elf, which can be found in the project Debug directory. N.B. check that the Partition Type for FSBL is bootloader
  • bora_wrapper.bit, which is the bitstream generated by the Vivado project (Partition Type must be Datafile)
  • u-boot.elf, which is the compiled U-Boot with .elf extension (Partition Type must be Datafile)
• in Output path, select the path for the BOOT.bin file.