Difference between revisions of "Creating and building example Vivado project (BELK/BXELK)"
(→Creating and building a Zynq project for BORA using the command line) |
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*enter the git directory and launch the following command | *enter the git directory and launch the following command | ||
*:<code>export PROJ_DIR=$(pwd)/../bora-build-YYYYMMDD-nobk</code> | *:<code>export PROJ_DIR=$(pwd)/../bora-build-YYYYMMDD-nobk</code> | ||
| − | *launch the Vivado Design Suite with the following commands: | + | *launch the Vivado Design Suite with the following commands{{efn|In a 32 bit system, Vivado settings are configured with the following command <code>/opt/Xilinx/Vivado/2014.4/settings32.sh</code>}}: |
<pre> | <pre> | ||
. /opt/Xilinx/Vivado/2014.4/settings64.sh1 | . /opt/Xilinx/Vivado/2014.4/settings64.sh1 | ||
vivado -mode tcl -source build_project.tcl -notrace -tclargs "-bitstream" | vivado -mode tcl -source build_project.tcl -notrace -tclargs "-bitstream" | ||
</pre> | </pre> | ||
| + | *at the end of the bitstream build process, the <code>build_project</code> script allows to automatically export hardware and lauch SDK to build the FSBL | ||
| + | *once the Xilinx SDK is ready, perform the following operations from the GUI: | ||
| + | **Click on ''File -> New -> Application Project'' | ||
| + | **Select the Project Name: ''bora_FSBL'' | ||
| + | **Click ''Next'' | ||
| + | **Select ''Template: Zynq FSBL'' | ||
| + | **Click on Finish | ||
| + | **Apply the patch, right-clicking on ''bora_FSBL'' in Project Explorer and then by clicking on ''Team -> Apply Patch..'' | ||
| + | **From ''Browse...'' open the file <code><bora_repo>/patch/belk-sd-boot.patch</code> | ||
| + | **Click ''Next'' | ||
| + | **Select ''Apply the patch to the selected file, folder or project:'' and select <code>main.c</code> from ''bora_FSBL -> src'' | ||
| + | **Click ''Next'' | ||
| + | **Check that the patch is correctly applied to the source code and click on ''Finish'' | ||
Revision as of 11:57, 28 October 2015
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The following sections describe how to perform the most common tasks for building the software components for a BORA/BORAX-based embedded system.
Creating and building a Zynq project for BORA using the command line[edit | edit source]
- start the Zynq development server and login into the system
- assuming that a local repository has not been created, clone the remote BORA git repository:
git clone git@git.dave.eu:dave/bora/bora.git
- copy the
<bora_repo>/boards/board_parts/zynq/BELK_2.2.0directory to<vivado_2014.4_install_dir>/data/boards/board_parts/zynq/:
cd <bora_repo> sudo cp -r boards/board_parts/zynq/BELK_2.2.0 /opt/Xilinx/Vivado/2014.4/data/boards/board_parts/zynq/
- enter the git directory and launch the following command
export PROJ_DIR=$(pwd)/../bora-build-YYYYMMDD-nobk
- launch the Vivado Design Suite with the following commands[a]:
. /opt/Xilinx/Vivado/2014.4/settings64.sh1 vivado -mode tcl -source build_project.tcl -notrace -tclargs "-bitstream"
- at the end of the bitstream build process, the
build_projectscript allows to automatically export hardware and lauch SDK to build the FSBL - once the Xilinx SDK is ready, perform the following operations from the GUI:
- Click on File -> New -> Application Project
- Select the Project Name: bora_FSBL
- Click Next
- Select Template: Zynq FSBL
- Click on Finish
- Apply the patch, right-clicking on bora_FSBL in Project Explorer and then by clicking on Team -> Apply Patch..
- From Browse... open the file
<bora_repo>/patch/belk-sd-boot.patch - Click Next
- Select Apply the patch to the selected file, folder or project: and select
main.cfrom bora_FSBL -> src - Click Next
- Check that the patch is correctly applied to the source code and click on Finish
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