Difference between revisions of "BORA Xpress SOM/BORA Xpress Hardware/Peripherals/Processing System (PS)"

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__FORCETOC__
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{{#lst:Processing_system_peripherals_(BORAXpress)|PS}}
 
{{#lst:Processing_system_peripherals_(BORAXpress)|PS}}
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<section end="Body" />

Latest revision as of 15:13, 11 January 2024

History
Issue Date Notes

2021/11/22

New documentation layout
2022/03/01 Updated MIO pins



The 54 pins of the MIO module are assigned as reported in the following table:

MIO Pins Function
MIO[0:14] Quad-SPI and NAND flash
MIO[15] EX_WDT_REARM (watchdog WDI)
Optionally, it can act as SWDT reset out
MIO[16:27] Gigabit Ethernet
MIO[28:39] USB On-The-Go
MIO[40:45] SD/SDIO/MMC
MIO[46:47] I²C0
MIO[48:49] UART1
MIO[50] USB PHY reset
MIO[51] ETH0 PHY reset
MIO[52] Ethernet Management Data Clock input
MIO[53] Ethernet Management Data Input/Output