Difference between revisions of "BORA Xpress SOM"

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{{Applies To BoraX}}
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==Introduction==
!colspan="3" style="width:60%; border-left:solid 2px #ededed; border-right:solid 0px #ededed; border-top:solid 2px #ededed;border-bottom:solid 0px #ededed; background-color:#ededed; font-size:14px; color:#000000; text-align:center" | BORA Xpress System On Module
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!colspan="2" style="width:40%; border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7; border-top:solid 2px #73B2C7;border-bottom:solid 0px #ededed; background-color:#ededed; font-size:14px; color:#000000; text-align:center" | BORA Xpress SOM Evaluation Kit
+
BORA Xpress is the top-class Dual Cortex-A9 + FPGA CPU module by DAVE Embedded Systems, based on the recent Xilinx "Zynq" XC7Z015 / XC7Z030 application processor.
 +
BORA Xpress offers great computational power, thanks to the rich set of peripherals, the Dual Cortex-A9 and the Artix-7 FPGA inside.
 +
BORA Xpress is designed in order to keep full compatibility with the ULTRA Line CPU modules, to guarantee the premium quality and technical value of those customers that require top performances.
 +
 
 +
The [[BORA_Xpress_SOM#Hardware | Hardware]] section provides detailed information about hardware interfaces and characteristics. This document will provide a functional overview of the module and will focus on system-related issues.
 +
 
 +
==Block diagram==
 +
 
 +
The following picture shows a simplified block diagram of BORA Xpress module.
 +
 
 +
[[File:BORA-Xpress-bd-1600.png|600px|center]]
 +
 
 +
== Product Highlights ==
 +
 
 +
* Unmatched performance thanks to Dual ARM Cortex-A9 @ up to 1GHz
 +
* SERDES: Xpress lanes up to 6.25 Gbps
 +
* All memories you need: on-board NOR and NAND Flash
 +
* Enabling smarter system thanks to Artix-7 or Kintex-7 FPGA integrated on-chip
 +
* FPGA banks wide range PSU input from 1.2V to 3.3V
 +
* Highest security and reliability: internal voltage monitoring and power good enable
 +
* Reduced carrier complexity: dual CAN, USB, Ethernet GB and native 3.3 V I/O
 +
* Easy to fit thanks to its small form factor
 +
* Accurate timing application thanks to on-board 5ppm RTC
 +
* Pin2Pin Compatibility with BORA SOM based on Zynq XC7Z010/XC7Z020
 +
 
 +
== Feature Summary ==
 +
{| class="wikitable" |
 +
| align="center" style="background:#f0f0f0;"|'''Feature'''
 +
| align="center" style="background:#f0f0f0;"|'''Specifications'''
 +
| align="center" style="background:#f0f0f0;"|'''Options'''
 +
|-
 +
| CPU||Xilinx Dual ARM Cortex-A9<br>ZYNQ XC7Z015/ZC7Z030 @ 666MHz (up to 1GHz) ||
 +
|-
 +
| Cache||L1: 32Kbyte instruction, 32Kbyte data<br>L2: 512Kbyte for each core ||
 +
|-
 +
| RAM|| DDR3 SDRAM @ 533 MHz<br>Up to 1 GB ||
 +
|-
 +
| SRAM|| On-chip RAM, 256 KB ||
 +
|-
 +
| Storage||Flash NOR SPI (8, 16 MB)<br>Flash NAND (all sizes up to 1GB, on request) ||
 +
|-
 +
|+ align="bottom" style="caption-side: bottom" | Table: CPU and Memories
 +
|}
 +
 
 +
{| class="wikitable" |  
 +
| align="center" style="background:#f0f0f0;"|'''Feature'''
 +
| align="center" style="background:#f0f0f0;"|'''Specifications'''
 +
| align="center" style="background:#f0f0f0;"|'''Options'''
 +
|-
 +
| Coprocessors|| NEON™ & Single / Double Precision<br>Floating Point for each processor||
 +
|-
 +
| USB||Up to 2x 2.0 OTG ports ||
 +
|-
 +
| UARTs||Up to 2x UART ports ||
 +
|-
 +
| GPIO||Up to x lines, shared with other functions (interrupts available) ||
 +
|-
 +
| Networks||Ethernet 10/100/1000 Mbps ||
 
|-
 
|-
|style="width:30%; border-left:solid 2px #ededed;border-right:solid 0px #ededed;border-top:solid 0px #ededed;border-bottom:solid 0px #ededed; text-align:center; background-color:#ffffff"| <br />[[File:BORA_Xpress.png|thumb|300px|center|BORA Xpress SOM TOP view]]
+
| CAN||2x full CAN 2.0B compliant interfaces ||
|style="width:30%; border-left:solid 0px #ededed;border-right:solid 0px #ededed;border-top:solid 0px #ededed;border-bottom:solid 0px #ededed; text-align:center; background-color:#ffffff"| <br />[[File:BORA_Xpress_BOTTOM.png|thumb|300px|center|BORA Xpress SOM BOTTOM view]]
 
|style="width:30%; border-left:solid 0px #ededed;border-right:solid 0px #ededed;border-top:solid 0px #ededed;border-bottom:solid 0px #ededed; text-align:center; background-color:#ffffff"|<br /> [[File:BORA-Xpress-bd-1600.png|thumb|300px|center|BORA Xpress Block diagram]]
 
|rowspan="2" style="width:40%; border-left:solid 2px #73B2C7;border-right:solid 2px #73B2C7;border-top:solid 0px #73B2C7;border-bottom:solid 2px #73B2C7; text-align:left; background-color:#ffffff"| <br/>[[File:BORAXpressEVB.png|thumb|300px|center|BORA Xpress SOM Evaluation Kit|link=BORA Xpress SOM/BORA Xpress Evaluation Kit ]]
 
<br/>
 
{{EvaluationKitDocumentation|nome-som=BORA Xpress }}
 
 
|-
 
|-
 +
| SD/MMC||2x SD/SDIO 2.0/MMC3.31 compliant controllers ||
 
|-
 
|-
|style="width:25%; border-left:solid 2px #ededed;border-right:solid 0px #ededed;border-top:solid 0px #ededed;border-bottom:solid 2px #ededed; text-align:left; padding:13px; background-color:#ffffff"|
+
| Serial buses||2x full-duplex SPI ports with three peripheral chip selects<br>2x master and slave I²C interfaces ||
* [https://mirror.dave.eu/marketing/BORA%20XPress/boraxpress-leaflet.pdf BORA Xpress SOM Brochure PDF]
 
* [[/Part number composition| BORA Xpress SOM P/N composition]]
 
* [[Dave_Developer%27s_Wiki_Conventions#RSS_Feeds| RSS feeding]]
 
* [[Dave_Developer's_Wiki:General_disclaimer|Disclaimer about this documentation]]
 
* [[/Longevity program | BORA Xpress SOM Longevity Program]]
 
| style="width:25%; border-left:solid 0px #ededed;border-right:solid 0px #ededed;border-top:solid 0px #ededed;border-bottom:solid 2px #ededed; text-align:left; padding:13px; background-color:#ffffff"|
 
* {{RFQ|product-name=BORA Xpress SOM}}
 
* {{CustomerService}}
 
* {{ServiceMaintenance}}
 
|style="width:50%; border-left:solid 0px #ededed;border-right:solid 0px #ededed;border-top:solid 0px #ededed;border-bottom:solid 2px #ededed; text-align:left; padding:13px; background-color:#ffffff"|
 
 
|-
 
|-
 +
| Timers||2x triple timers/counters (TTC) ||
 +
|-
 +
| RTC ||On board (DS3232), external battery powered ||
 +
|-
 +
| Debug||JTAG IEEE 1149.1 Test Access Port<br>CoreSight™ and Program Trace Macrocell (PTM) ||
 +
|-
 +
|+ align="bottom" style="caption-side: bottom" | Table: Peripherals
 
|}
 
|}
  
<br>
+
{| class="wikitable" |
 +
| align="center" style="background:#f0f0f0;"|'''Feature'''
 +
| align="center" style="background:#f0f0f0;"|'''Specifications'''
 +
| align="center" style="background:#f0f0f0;"|'''Options'''
 +
|-
 +
| FPGA models||Artix™-7 / Kintex™-7||
 +
|-
 +
| Logic cells||74K to 125K||
 +
|-
 +
| LUTs||46K to 78K||
 +
|-
 +
| Flip flops||92K to 157K||
 +
|-
 +
| RAM||3.3Mb to 9.3Mb||
 +
|-
 +
| DSP slices||160 to 400||
 +
|-
 +
| Differential pairs||Up to 72 differential pairs for high freq. interfaces||
 +
|-
 +
| Serial Transceivers||4 Lanes up to 6.6Gbps
 +
|-
 +
|+ align="bottom" style="caption-side: bottom" | Table: Electrical, Mechanical and Environmental Specifications
 +
|}
  
{|width="100%" style="border-collapse:collapse; font-size:12px"
+
{| class="wikitable" |
 +
| align="center" style="background:#f0f0f0;"|'''Feature'''
 +
| align="center" style="background:#f0f0f0;"|'''Specifications'''
 +
| align="center" style="background:#f0f0f0;"|'''Options'''
 +
|-
 +
| Supply Voltage||3.3V, on-board voltage regulation||
 +
|-
 +
| Active power consumption|| Please refer to [[Hardware_Manual_(BoraXpress)#Power_consumption | Power consumption]] section||
 
|-
 
|-
| style="width:30%; border-left:solid 2px #ededed;border-right:solid 2px #ededed;border-top:solid 2px #ededed;border-bottom:solid 2px #ededed; background-color:#ededed; text-align:left; font-size:14px; color:#000000" |Hardware
+
| Dimensions||85mm x 50mm||
| style="width:1%; border-left:solid 0px #ededed;border-right:solid 0px #ededed;border-top:solid 2px #ffffff;border-bottom:solid 0px #ededed; background-color:#ffffff" |
 
| style="width:30%; border-left:solid 2px #ededed;border-right:solid 2px #ededed;border-top:solid 2px #ededed;border-bottom:solid 2px #ededed; background-color:#ededed; text-align:left; font-size:14px; color:#000000" |Software
 
| style="width:1%; border-left:solid 0px #ededed;border-right:solid 0px #ededed;border-top:solid 2px #ffffff;border-bottom:solid 0px #ededed; background-color:#ffffff" |
 
| style="width:30%; border-left:solid 2px #ededed;border-right:solid 2px #ededed;border-top:solid 2px #ededed;border-bottom:solid 2px #ededed; background-color:#ededed; text-align:left; font-size:14px; color:#000000" |Insights
 
 
|-
 
|-
|style="width:30%; border-left:solid 2px #ededed;border-right:solid 2px #ededed;border-top:solid 2px #ededed;border-bottom:solid 2px #ededed; background-color:#ffffff; vertical-align:top"|
+
| Weight|| ||
* [[/BORA Xpress Hardware | BORA Xpress Hardware documentation]]
 
| style="width:1%; border-left:solid 0px #ededed;border-right:solid 0px #ededed;border-top:solid 0px #ededed;border-bottom:solid 2px #ffffff; background-color:#ffffff" |
 
|style="width:30%; border-left:solid 2px #ededed;border-right:solid 2px #ededed;border-top:solid 2px #ededed;border-bottom:solid 2px #ededed; background-color:#ffffff; vertical-align:top"|
 
* LINUX YOCTO Distribution
 
** [[DESK-XZ7-L | BORA Xpress Software Linux Kit: DESK-XZ7-L documentation]]
 
| style="width:1%; border-left:solid 0px #ededed;border-right:solid 0px #ededed;border-top:solid 0px #ededed;border-bottom:solid 2px #ffffff; background-color:#ffffff" |
 
| style="width:30%; border-left:solid 2px #ededed;border-right:solid 2px #ededed;border-top:solid 2px #ededed;border-bottom:solid 2px #ededed; background-color:#ffffff; vertical-align:top"|
 
* [[:Category:BORA Xpress | Category BORA Xpress SOM]]
 
* [[:Category:BORA Xpress AN | BORA Xpress Application Notes]]
 
* [[:Category:BORA Xpress TN | BORA Xpress Technical Notes]]
 
* [[:Category:BORA Xpress WP | BORA Xpress White Papers]]
 
* [[:Category:BORA Xpress CH | BORA Xpress Case Histories]]
 
 
|-
 
|-
 +
| MTBF|| ||
 +
|-
 +
| Operating temperature||0..70 °C<br>-40..+85 °C||
 +
|-
 +
| Connectors||3 x 140 pins 0.6mm pitch||
 +
|-
 +
|+ align="bottom" style="caption-side: bottom" | Table: Electrical, Mechanical and Environmental Specifications
 
|}
 
|}
  
[[Category:BORA Xpress]]
+
 
 +
==Hardware==
 +
 
 +
Please refer to [[Hardware Manual (BORAXpress)]] for detailed hardware related information on BORA Xpress SOM.
 +
 
 +
=== Design Overview ===
 +
 
 +
Please refer to [[Design Overview (BORAXpress)|this page]] for more details.
 +
 
 +
===Mechanicals===
 +
 
 +
Please refer to [[Mechanicals (BORAXpress)|this page]] for more details.
 +
 
 +
===Pinout===
 +
 
 +
Please refer to [[Pinout (BORAXpress)|this page]] for more details.
 +
 
 +
===Power===
 +
 
 +
Please refer to [[Power (BORAXpress)|this page]] for more details.
 +
 
 +
===Reset scheme===
 +
 
 +
Bora provides several different resets signals. Please refer to [[Reset scheme (BORAXpress)|Reset scheme]] for more details.
 +
 
 +
===Processing system (PS) peripherals===
 +
 
 +
Please refer to [[Processing system peripherals (BORAXpress)|this page]] for more details.
 +
 
 +
===Programmable logic (PL)===
 +
 
 +
Please refer to [[Programmable logic (BORAXpress)|this page]] for more details.
 +
 
 +
=== RTC ===
 +
 
 +
Please refer to [[RTC (BORAXpress)|this page]] for more details.
 +
 
 +
=== Thermal IC ===
 +
 
 +
Please refer to [[Thermal IC (BORAXpress)|this page]] for more details.
 +
 
 +
=== Watchdog ===
 +
 
 +
Please refer to [[Watchdog (BORAXpress)|this page]] for more details.
 +
 
 +
== Software ==
 +
 
 +
=== Introduction to the development environment ===
 +
 
 +
Please refer to {{OldRevision | page=Introduction_to_developing_environment_(BELK) | revision=4000 | text=this page}} for more details.
 +
 
 +
=== Build system ===
 +
 
 +
Please refer to {{OldRevision | page=Build_system_(BELK) | revision=4077 | text=this page}} for more details.
 +
 
 +
=== Creating and building an example Vivado project ===
 +
 
 +
Please refer to {{OldRevision | page=Creating_and_building_example_Vivado_project_(BELK) | revision=4196 | text=this page}} for more details.
 +
 
 +
=== Building U-Boot ===
 +
 
 +
Please refer to {{OldRevision | page=Building_U-Boot_(BELK) | revision=4093 | text=this page}} for more details.
 +
 
 +
=== Building Linux ===
 +
 
 +
Please refer to {{OldRevision | page=Building_Linux_kernel_(BELK) | revision=4094 | text=this page}} for more details.
 +
 
 +
=== Building the software components via Yocto ===
 +
 
 +
Please refer to {{OldRevision | page=Building_the_software_components_via_Yocto_(BELK) | revision=4176 | text=this page}} for more details.
 +
 
 +
=== Booting the system via NFS ===
 +
 
 +
Please refer to {{OldRevision | page=Booting_the_system_via_NFS_(BELK) | revision=4159 | text=this page}} for more details.
 +
 
 +
=== System boot and recovery via microSD card ===
 +
 
 +
Please refer to {{OldRevision | page=System_boot_and_recovery_via_microSD_card_(BELK) | revision=4163 | text=this page}} for more details.
 +
 
 +
=== ConfigID management ===
 +
 
 +
Please refer to {{OldRevision | page=ConfigID_management_(BELK) | revision=4175 | text=this page}} for more details.

Revision as of 14:24, 2 March 2016

Info Box
BORA Xpress.png Applies to BORA Xpress

Introduction[edit | edit source]

BORA Xpress is the top-class Dual Cortex-A9 + FPGA CPU module by DAVE Embedded Systems, based on the recent Xilinx "Zynq" XC7Z015 / XC7Z030 application processor. BORA Xpress offers great computational power, thanks to the rich set of peripherals, the Dual Cortex-A9 and the Artix-7 FPGA inside. BORA Xpress is designed in order to keep full compatibility with the ULTRA Line CPU modules, to guarantee the premium quality and technical value of those customers that require top performances.

The Hardware section provides detailed information about hardware interfaces and characteristics. This document will provide a functional overview of the module and will focus on system-related issues.

Block diagram[edit | edit source]

The following picture shows a simplified block diagram of BORA Xpress module.

BORA-Xpress-bd-1600.png

Product Highlights[edit | edit source]

  • Unmatched performance thanks to Dual ARM Cortex-A9 @ up to 1GHz
  • SERDES: Xpress lanes up to 6.25 Gbps
  • All memories you need: on-board NOR and NAND Flash
  • Enabling smarter system thanks to Artix-7 or Kintex-7 FPGA integrated on-chip
  • FPGA banks wide range PSU input from 1.2V to 3.3V
  • Highest security and reliability: internal voltage monitoring and power good enable
  • Reduced carrier complexity: dual CAN, USB, Ethernet GB and native 3.3 V I/O
  • Easy to fit thanks to its small form factor
  • Accurate timing application thanks to on-board 5ppm RTC
  • Pin2Pin Compatibility with BORA SOM based on Zynq XC7Z010/XC7Z020

Feature Summary[edit | edit source]

Feature Specifications Options
CPU Xilinx Dual ARM Cortex-A9
ZYNQ XC7Z015/ZC7Z030 @ 666MHz (up to 1GHz)
Cache L1: 32Kbyte instruction, 32Kbyte data
L2: 512Kbyte for each core
RAM DDR3 SDRAM @ 533 MHz
Up to 1 GB
SRAM On-chip RAM, 256 KB
Storage Flash NOR SPI (8, 16 MB)
Flash NAND (all sizes up to 1GB, on request)
Table: CPU and Memories
Feature Specifications Options
Coprocessors NEON™ & Single / Double Precision
Floating Point for each processor
USB Up to 2x 2.0 OTG ports
UARTs Up to 2x UART ports
GPIO Up to x lines, shared with other functions (interrupts available)
Networks Ethernet 10/100/1000 Mbps
CAN 2x full CAN 2.0B compliant interfaces
SD/MMC 2x SD/SDIO 2.0/MMC3.31 compliant controllers
Serial buses 2x full-duplex SPI ports with three peripheral chip selects
2x master and slave I²C interfaces
Timers 2x triple timers/counters (TTC)
RTC On board (DS3232), external battery powered
Debug JTAG IEEE 1149.1 Test Access Port
CoreSight™ and Program Trace Macrocell (PTM)
Table: Peripherals
Feature Specifications Options
FPGA models Artix™-7 / Kintex™-7
Logic cells 74K to 125K
LUTs 46K to 78K
Flip flops 92K to 157K
RAM 3.3Mb to 9.3Mb
DSP slices 160 to 400
Differential pairs Up to 72 differential pairs for high freq. interfaces
Serial Transceivers 4 Lanes up to 6.6Gbps
Table: Electrical, Mechanical and Environmental Specifications
Feature Specifications Options
Supply Voltage 3.3V, on-board voltage regulation
Active power consumption Please refer to Power consumption section
Dimensions 85mm x 50mm
Weight
MTBF
Operating temperature 0..70 °C
-40..+85 °C
Connectors 3 x 140 pins 0.6mm pitch
Table: Electrical, Mechanical and Environmental Specifications


Hardware[edit | edit source]

Please refer to Hardware Manual (BORAXpress) for detailed hardware related information on BORA Xpress SOM.

Design Overview[edit | edit source]

Please refer to this page for more details.

Mechanicals[edit | edit source]

Please refer to this page for more details.

Pinout[edit | edit source]

Please refer to this page for more details.

Power[edit | edit source]

Please refer to this page for more details.

Reset scheme[edit | edit source]

Bora provides several different resets signals. Please refer to Reset scheme for more details.

Processing system (PS) peripherals[edit | edit source]

Please refer to this page for more details.

Programmable logic (PL)[edit | edit source]

Please refer to this page for more details.

RTC[edit | edit source]

Please refer to this page for more details.

Thermal IC[edit | edit source]

Please refer to this page for more details.

Watchdog[edit | edit source]

Please refer to this page for more details.

Software[edit | edit source]

Introduction to the development environment[edit | edit source]

Please refer to this page

for more details.

Build system[edit | edit source]

Please refer to this page

for more details.

Creating and building an example Vivado project[edit | edit source]

Please refer to this page

for more details.

Building U-Boot[edit | edit source]

Please refer to this page

for more details.

Building Linux[edit | edit source]

Please refer to this page

for more details.

Building the software components via Yocto[edit | edit source]

Please refer to this page

for more details.

Booting the system via NFS[edit | edit source]

Please refer to this page

for more details.

System boot and recovery via microSD card[edit | edit source]

Please refer to this page

for more details.

ConfigID management[edit | edit source]

Please refer to this page

for more details.