Additional UART on Linux (Naon)
| HOME | SOMs | SBCs | ToloMEO Embedded Assistant |  GET A QUOTE
|
 ONLINE HELPDESK
|
| Roadmap | IoT Services | ML/AI services | Embedded Design Services |
IntroductionEdit
In this article we will see how to add an additional UART which can be used by a standard Linux application.
As example, we'll use UART2.
Choose Pin Mux OptionEdit
UART2 TX/RX is available into different pins. We choose the following configuration:
| Functional Pin | Naon Connector Phisical Pin | CPU Ball |
|---|---|---|
| UART2_TXD | J2.31 | AD23 |
| UART2_RXD | J2.30 | AE23 |
Configure Pin Mux with Pin Mux UtilityEdit
Open the Pin Mux Utility and load the default Naon configuration provided with your development kit.
Into the Peripheral Interfaces box, right-click on UART2 device and choose View Pins
UART2 Pin Mux Configuration 1.png
UART2 Interface View window opens and we can see the various UART2 options.
UART2 Pin Mux Configuration 1.png
In this
UART2 Pin Mux Configuration 2.png
User can easily see that the pin we choose are already configured for GPMC peripheral. However, in our example design, we suppose that we don't need those lines.
Double click on Fcn6 column of AE23 and AD23 ball
UART2 Pin Mux Configuration 3.png
As you can see, the Pin Mux Utility warn about a usage conflict. Double click on both lines in column Fcn5 to remove GPMC usage of those pins and the error disappears.
UART2 Pin Mux Configuration 4.png
Now the Pin Mux Utility allow the user to export the generated source code. See TI wiki article for more details.
Rebuild U-BootEdit
Copy the generated source code (pinmux.h) and overwrite the original board/dave/naon/pinmux.h file inside the source tree.
The differences between the two files should look like the following patch
diff --git a/board/dave/naon/pinmux.h b/board/dave/naon/pinmux.h
index c1fccd6..0e6b2e2 100644
--- a/board/dave/naon/pinmux.h
+++ b/board/dave/naon/pinmux.h
@@ -208,8 +208,8 @@ MUX_VAL(PINCNTL168, (IEN | IPU | DISABLED )) /* safe_mode */\
MUX_VAL(PINCNTL169, (IEN | IPD | DISABLED )) /* safe_mode */\
MUX_VAL(PINCNTL170, (IEN | IPD | DISABLED )) /* safe_mode */\
MUX_VAL(PINCNTL171, (IEN | IPD | DISABLED )) /* safe_mode */\
-MUX_VAL(PINCNTL172, (IEN | IPD | DISABLED )) /* safe_mode */\
-MUX_VAL(PINCNTL173, (IEN | IPU | DISABLED )) /* safe_mode */\
+MUX_VAL(PINCNTL172, (IDIS | IPD | FCN6 )) /* UART2_RXD_MUX0 */\
+MUX_VAL(PINCNTL173, (IDIS | IPD | FCN6 )) /* UART2_TXD_MUX1 */\
MUX_VAL(PINCNTL174, (IEN | IPD | DISABLED )) /* safe_mode */\
MUX_VAL(PINCNTL175, (IEN | IPD | FCN1 )) /* VOUT[0]_FLD_MUX1 */\
MUX_VAL(PINCNTL176, (IEN | IPD | FCN1 )) /* VOUT[0]_CLK */\