Difference between revisions of "AXEL Lite SOM/AXEL Lite Hardware/Power and Reset/Power Supply Unit (PSU) and recommended power-up sequence"
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== Power Supply Unit (PSU) and recommended power-up sequence == | == Power Supply Unit (PSU) and recommended power-up sequence == | ||
| − | Implementing correct power-up sequence for | + | Implementing correct power-up sequence for i.MX6 processors is not a trivial task because several power rails are involved. |
AXEL Lite SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry: | AXEL Lite SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry: | ||
| Line 33: | Line 33: | ||
=== Power-up sequence=== | === Power-up sequence=== | ||
| − | + | The typical power-up sequence is the following: | |
| + | # (optional) PMIC_LICELL is powered | ||
| + | # 3.3VIN main power supply rail is powered | ||
| + | # CPU_PORn (active-low) is driven low | ||
| + | # PMIC activates PMIC_VSNVS power output | ||
| + | # PMIC_PWRON signal is pulled-up (unless carrier board circuitry keeps this signal low for any reason) | ||
| + | # PMIC transitions from OFF to ON state | ||
| + | # PMIC initiates power-up sequence needed by MX6 processor | ||
| + | # BOARD_PGOOD signal is raised; this active-high signal indicates that SoM's I/O is powered. This signal can be used to manage carrier board power up sequence in order to prevent back powering (from SoM to carrier board or vice versa). For additional information, please refer to the [[Power_(AxelLite)#Note_on_BOARD_PGOOD_usage | Note]] below. | ||
| + | # CPU_PORn is released | ||
==== Note on BOARD_PGOOD usage ==== | ==== Note on BOARD_PGOOD usage ==== | ||
| − | |||
| − | |||
BOARD_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals. | BOARD_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals. | ||
Revision as of 09:48, 18 September 2020
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Power Supply Unit (PSU) and recommended power-up sequence[edit | edit source]
Implementing correct power-up sequence for i.MX6 processors is not a trivial task because several power rails are involved.
AXEL Lite SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry:
The PSU is composed of two main blocks:
- power management integrated circuit
- additional generic power management circuitry that completes PMIC functionalities
The PSU:
- generates the proper power-up sequence required by the SOC processor and surrounding memories and peripherals
- synchronizes the powering up of carrier board in order to prevent back power
- provides some spare regulated voltages that can be used to power carrier board devices
Power-up sequence[edit | edit source]
The typical power-up sequence is the following:
- (optional) PMIC_LICELL is powered
- 3.3VIN main power supply rail is powered
- CPU_PORn (active-low) is driven low
- PMIC activates PMIC_VSNVS power output
- PMIC_PWRON signal is pulled-up (unless carrier board circuitry keeps this signal low for any reason)
- PMIC transitions from OFF to ON state
- PMIC initiates power-up sequence needed by MX6 processor
- BOARD_PGOOD signal is raised; this active-high signal indicates that SoM's I/O is powered. This signal can be used to manage carrier board power up sequence in order to prevent back powering (from SoM to carrier board or vice versa). For additional information, please refer to the Note below.
- CPU_PORn is released
Note on BOARD_PGOOD usage[edit | edit source]
BOARD_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals.
Depending on the kind of such loads, BOARD_PGOOD might not be able to drive them properly. In these cases a simple 2-input AND port can be used to address this issue. The following picture depicts a principle schematic showing this solution.
VDD_SOM denotes the power rail used to power AXEL Lite SoM.
