AXEL Lite SOM/AXEL Lite Hardware/Pinout Table

History
Version	Issue Date	Notes
X.Y.Z	Month Year	TBD
[TBD_link X.Y.Z]	Month Year	TBD
...	...	...

Contents

Pinout TableEdit

TBD: modificare la tabella seguente con le caratteristiche dei pin del SOM

TBD: modificare le due tabelle ODD e EVEN con la mappa completa dei pins

IntroductionEdit

This chapter contains the pinout description of the AXEL Lite module, grouped in two tables (odd and even pins) that report the pin mapping of the TBD: connector type AXEL Lite connector.

Each row in the pinout tables contains the following information:

Pin	Reference to the connector pin
Pin Name	Pin (signal) name on the AxelLite connectors
Internal connections	Connections to the Axel Ultra components CPU.<x> : pin connected to CPU pad named <x> CAN.<x> : pin connected to the CAN transceiver PMIC.<x> : pin connected to the Power Manager IC LAN.<x> : pin connected to the LAN PHY NOR.<x>: pin connected to the flash NOR SV.<x>: pin connected to voltage supervisor MTR: pin connected to voltage monitors
Ball/pin #	Component ball/pin number connected to signal
Voltage	I/O voltage levels
Type	Pin type: I = Input O = Output D = Differential Z = High impedance S = Power supply voltage G = Ground A = Analog signal
Notes	Remarks on special pin characteristics
Pin MUX alternative functions	Muxes: Pin ALT-0 Pin ALT-1 Pin ALT-2 Pin ALT-3 Pin ALT-4 Pin ALT-5 Pin ALT-6 Pin ALT-7 Pin ALT-8

Pinout Table ODD pins declarationEdit

Pin	Pin Name	Internal Connections	Ball/pin #	Voltage|domain	Type	Notes	Alternative Functions
J2.69	SD2_CMD	CPU.SD2_CMD	F19	AXEL_IO_3V3	IO		Pin ALT-0	SD2_CMD
							Pin ALT-1	ECSPI5_MOSI
							Pin ALT-2	KEY_ROW5
							Pin ALT-3	AUD4_RXC
							Pin ALT-5	GPIO1_IO11

Pinout Table EVEN pins declarationEdit

Pin	Pin Name	Internal Connections	Ball/pin #	Voltage|domain	Type	Notes	Alternative Functions
J2.69	SD2_CMD	CPU.SD2_CMD	F19	AXEL_IO_3V3	IO		Pin ALT-0	SD2_CMD
							Pin ALT-1	ECSPI5_MOSI
							Pin ALT-2	KEY_ROW5
							Pin ALT-3	AUD4_RXC
							Pin ALT-5	GPIO1_IO11

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