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Difference between revisions of "AXEL Lite SOM/AXEL Lite Hardware/Peripherals/GPIO"

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Latest revision as of 17:18, 8 January 2024

History
Issue Date Notes
2020/10/27 New documentation layout



Contents

Peripheral GPIOEdit

The GPIO general-purpose input/output peripheral provides dedicated general-purpose pins that can be configured as either inputs or outputs.

DescriptionEdit

The GPIOs interface available on AXEL Lite is based on i.MX6 SoC.

The GPIO functionality is provided through registers, an edge-detect circuit, and interrupt generation logic.

When configured as an output, it is possible to write to an internal register to control the state driven on the output pin. When configured as an input, it is possible to detect the state of the input by reading the state of an internal register. In addition, the GPIO peripheral can produce CORE interrupts.

Pin mappingEdit

The Pin mapping is described in the Pinout table section