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<section end="History" />__FORCETOC__<section begin="Body" /> This page provides an overview of the issues related to powering AURA SOM. For more details about the signals that are involved, please see also [[File:TBD.png AURA SOM/AURA Hardware/Pinout Table| center | 400pxthis page]].
== Power Supply Unit (PSU) and recommended power-up sequence ==
Implementing correct power-up sequence for i.MX93 SOC SoC processors is not a trivial task because several power rails are involved.
AURA SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry:
The PSU is composed of two main blocks:
* power management integrated circuit (PMIC)
* additional generic power management circuitry that completes PMIC functionalities.
The PSU:
* generates the proper power-up sequence required by the SOC processor and SoC, surrounding memories , and peripherals* synchronizes the powering up of carrier board 's circuitry to prevent back powerpowering.
=== Power-up sequence===
The typical power-up sequence is the following:
# VIN_SOM (+3.3V) main power supply rail is powered.# CPU_PORn (active-low) is driven low by PMIC; PMIC initiates power-up sequence needed by iMX93x processor.# SOM_PGOOD goes up when all CPUSoC, memories , and I/O power rail is rails are ready.# finally Finally PMIC releases CPU_PORn; this signal bring brings the processor out of reset.
==== Note on SOM_PGOOD usage ====
SOM_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signalsin order to prevent back power.
Depending on the kind of such loads, SOM_PGOOD might not be able to drive them properly. On AURA SOM this signal is driven by a push-pull output at NVCC_3V3 rail, with max 20 mA output current.
==== Note on CPU_PORn ====
Internally to the SOM, CPU_PORn is pulled-up with 100 kohm to NVCC_BBSM_1V8 railkOhm. <section end="Body" /> 
[[Category:AURA]]
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