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<section end="History" />__FORCETOC__<section begin="Body" /> This page provides an overview of the issues related to powering AURA SOM. For more details about the signals that are involved, please see also [[File:TBD.png AURA SOM/AURA Hardware/Pinout Table| center | 400pxthis page]].
== Power Supply Unit (PSU) and recommended power-up sequence ==
The PSU is composed of two main blocks:
* power management integrated circuit (PMIC)
* additional generic power management circuitry that completes PMIC functionalities.
The PSU:
* generates the proper power-up sequence required by the SoC processor and , surrounding memories , and peripherals* synchronizes the powering up of carrier board 's circuitry to prevent back powerpowering.
=== Power-up sequence===
The typical power-up sequence is the following:
# VIN_SOM (+3.3V) main power supply rail is powered.# CPU_PORn (active-low) is driven low by PMIC; PMIC initiates power-up sequence needed by iMX93x processor.# SOM_PGOOD goes up when all CPUSoC, memories , and I/O power rail is rails are ready.# finally Finally PMIC releases CPU_PORn; this signal bring brings the processor out of reset.
==== Note on SOM_PGOOD usage ====
==== Note on CPU_PORn ====
Internally to the SOM, CPU_PORn is pulled-up with 100 kohm <s>to NVCC_BBSM_1V8 rail</s>kOhm. <section end="Body" />
[[Category:AURA]]
