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AURA SOM/AURA Hardware/Power and Reset/Power Supply Unit (PSU) and recommended power-up sequence

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!colspan="4" style="width:100%; text-align:left"; border-bottom:solid 2px #ededed"|History
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!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Issue Date!style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#73B2C7; padding:5px; color:white"|Notes
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|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|Year2024/mm02/dd14|style="border-left:solid 2px #73B2C7; border-right:solid 2px #73B2C7;border-top:solid 2px #73B2C7; border-bottom:solid 2px #73B2C7; background-color:#edf8fb; padding:5px; color:#000000"|TBDFirst documentation release
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<section end="History" />__FORCETOC__<section begin="Body" />This page provides an overview of the issues related to powering AURA SOM. For more details about the signals that are involved, please see also [[AURA SOM/AURA Hardware/Pinout Table|this page]].
== Power Supply Unit (PSU) and recommended power-up sequence ==
Implementing correct power-up sequence for ''TBD: SOC ''' i.MX93 SoC processors is not a trivial task because several power rails are involved.
AURA SOM simplifies this task by embedding all the needed circuitry. The following picture shows a simplified block diagram of PSU/voltage monitoring circuitry:
The PSU is composed of two main blocks:
* power management integrated circuit(PMIC)* additional generic power management circuitry that completes PMIC functionalities.
The PSU:
* generates the proper power-up sequence required by the SOC processor and SoC, surrounding memories , and peripherals* synchronizes the powering up of carrier board in order 's circuitry to prevent back power* provides some spare regulated voltages that can be used to power carrier board devicespowering.
=== Power-up sequence===
The typical power-up sequence is the following:
''TBD: descrizione dei segnali che intervengono nella PS''# VIN_SOM (+3.3V) main power supply rail is powered.# CPU_PORn (active-low) is driven low by PMIC; PMIC initiates power-up sequence needed by iMX93x processor.# SOM_PGOOD goes up when all SoC, memories, and I/O power rails are ready.# Finally PMIC releases CPU_PORn; this signal brings the processor out of reset.
==== Note on BOARD_PGOOD SOM_PGOOD usage ====
''TBD: verificare le note sul BOARD_PGOOD''SOM_PGOOD is generally used on carrier board to drive loads such as DC/DC enable inputs or switch on/off control signals in order to prevent back power.
BOARD_PGOOD is generally used Depending on carrier board the kind of such loads, SOM_PGOOD might not be able to drive loads such as DC/DC enable inputs or switch on/off control signalsthem properly. On AURA SOM this signal is driven by a push-pull output at NVCC_3V3 rail, with max 20 mA output current.
Depending ==== Note on the kind of such loads, BOARD_PGOOD might not be able to drive them properly. In these cases a simple 2-input AND port can be used to address this issue. The following picture depicts a principle schematic showing this solution.  VDD_SOM denotes the power rail used to power AURA SoM.  [[File:AURA-power-good.png]]  <section endCPU_PORn ====Body/>
Internally to the SOM, CPU_PORn is pulled-up with 100 kOhm.<section end="Body" />
[[Category:AURA]]
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