Difference between revisions of "ORCA SOM/ORCA Hardware/Peripherals/I2C"
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==Peripheral I2C == | ==Peripheral I2C == | ||
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The Pin mapping is described in the [[ORCA SOM/ORCA Hardware/Pinout_Table | Pinout table section]] | The Pin mapping is described in the [[ORCA SOM/ORCA Hardware/Pinout_Table | Pinout table section]] | ||
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Revision as of 15:26, 13 December 2021
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Peripheral I2C[edit | edit source]
I2C is a two-wire, bidirectional serial bus that provides a simple, efficient method of data exchange, minimizing the interconnection between devices.
This bus is suitable for applications requiring occasional communications over a short distance between many devices.
Description[edit | edit source]
The three I2C interface available on ORCA is based on iMX8MPlus SoC and it is designed to be compatible with the PhilipsTM I2C bus protocol.
The iMX8MPlus SOC has six I2C bus interfaces, but there is some limitation about:
- The I2C1 bus is internally used for PMIC and it is not available if the secure element unit is on board
See Pin mapping tables for connection details.
Features[edit | edit source]
The I2C port supports the following standards and features:
- Compatibility with I2C bus standard
- Multimaster operation
- Software programmability for one of 64 different serial clock frequencies
- Software-selectable acknowledge bit
- Interrupt-driven, byte-by-byte data transfer
- Arbitration-lost interrupt with automatic mode switching from master to slave
- Calling address identification interrupt
- Start and stop signal generation/detection
- Repeated Start signal generation
- Acknowledge bit generation/detection
- Bus-busy detection
Pin mapping[edit | edit source]
The Pin mapping is described in the Pinout table section
