Difference between revisions of "On board JTAG connector (AxelLite)"
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{{AppliesToAxelLite}} | {{AppliesToAxelLite}} | ||
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== Introduction == | == Introduction == | ||
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|2 || JTAG_TCK || - || - | |2 || JTAG_TCK || - || - | ||
|- | |- | ||
| − | |3 || JTAG_TMS || - || | + | |3 || JTAG_TMS || - || - |
|- | |- | ||
| − | |4 || JTAG_TDO || - || | + | |4 || JTAG_TDO || - || - |
|- | |- | ||
| − | |5 || JTAG_TDI || - || | + | |5 || JTAG_TDI || - || - |
|- | |- | ||
| − | |6 || JTAG_nTRST || - || | + | |6 || JTAG_nTRST || - || - |
|- | |- | ||
|7 || CPU_PORn || - || - | |7 || CPU_PORn || - || - | ||
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|9 || N.C. || - || - | |9 || N.C. || - || - | ||
|- | |- | ||
| − | |10 || JTAG_VREF || - || | + | |10 || JTAG_VREF || - || - |
|- | |- | ||
|} | |} | ||
Revision as of 14:27, 15 October 2019
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Introduction[edit | edit source]
JTAG signals are routed to a dedicated connector (J7) on the Axel Lite PCB. The connector is placed on the top side of the PCB, at the upper-right corner (please see the picture below).
J7 - Connector's pinout[edit | edit source]
J7 footprint mates with Samtec FSI-110-03-G-S connector. The following table reports the connector's pinout:
| Pin# | Pin name | Function | Notes |
|---|---|---|---|
| 1 | DGND | - | - |
| 2 | JTAG_TCK | - | - |
| 3 | JTAG_TMS | - | - |
| 4 | JTAG_TDO | - | - |
| 5 | JTAG_TDI | - | - |
| 6 | JTAG_nTRST | - | - |
| 7 | CPU_PORn | - | - |
| 8 | N.C. | - | - |
| 9 | N.C. | - | - |
| 10 | JTAG_VREF | - | - |
